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Date:   Mon, 27 Nov 2023 11:08:18 +0100
From:   Joerg Roedel <joro@8bytes.org>
To:     Lu Baolu <baolu.lu@linux.intel.com>
Cc:     mohd.syazwan.abdul.halim@intel.com,
        Kunwu Chan <chentao@kylinos.cn>, iommu@lists.linux.dev,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/7] [PULL REQUEST] iommu/vt-d: Fixes for v6.7-rc3
Message-ID: <ZWRqkkHgdj9W_xlT@8bytes.org>
References: <20231122032608.165144-1-baolu.lu@linux.intel.com>
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On Wed, Nov 22, 2023 at 11:26:01AM +0800, Lu Baolu wrote:
> Abdul Halim, Mohd Syazwan (1):
>   iommu/vt-d: Add MTL to quirk list to skip TE disabling
> 
> Kunwu Chan (1):
>   iommu/vt-d: Set variable intel_dirty_ops to static
> 
> Lu Baolu (5):
>   iommu/vt-d: Support enforce_cache_coherency only for empty domains
>   iommu/vt-d: Omit devTLB invalidation requests when TES=0
>   iommu/vt-d: Disable PCI ATS in legacy passthrough mode
>   iommu/vt-d: Make context clearing consistent with context mapping
>   iommu/vt-d: Fix incorrect cache invalidation for mm notification

Applied for v6.7, thanks.