From: Andrea Parri <parri.andrea@gmail.com>
To: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Cc: paulmck@kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com,
aou@eecs.berkeley.edu, mmaas@google.com, hboehm@google.com,
striker@us.ibm.com, charlie@rivosinc.com, rehn@rivosinc.com,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] membarrier: riscv: Provide core serializing command
Date: Wed, 29 Nov 2023 19:29:43 +0100 [thread overview]
Message-ID: <ZWeDF0eHyOc/b9UJ@andrea> (raw)
In-Reply-To: <0a84c0e0-2571-4c7f-82ae-a429f467a16b@efficios.com>
> > diff --git a/arch/riscv/mm/context.c b/arch/riscv/mm/context.c
> > index 217fd4de61342..f63222513076d 100644
> > --- a/arch/riscv/mm/context.c
> > +++ b/arch/riscv/mm/context.c
> > @@ -323,6 +323,23 @@ void switch_mm(struct mm_struct *prev, struct mm_struct *next,
> > if (unlikely(prev == next))
> > return;
> > +#if defined(CONFIG_MEMBARRIER) && defined(CONFIG_SMP)
> > + /*
> > + * The membarrier system call requires a full memory barrier
> > + * after storing to rq->curr, before going back to user-space.
> > + *
> > + * Only need the full barrier when switching between processes:
> > + * barrier when switching from kernel to userspace is not
> > + * required here, given that it is implied by mmdrop(); barrier
> > + * when switching from userspace to kernel is not needed after
> > + * store to rq->curr.
> > + */
> > + if (unlikely(atomic_read(&next->membarrier_state) &
> > + (MEMBARRIER_STATE_PRIVATE_EXPEDITED |
> > + MEMBARRIER_STATE_GLOBAL_EXPEDITED)) && prev)
> > + smp_mb();
> > +#endif
>
> The approach looks good. Please implement it within a separate
> membarrier_arch_switch_mm() as done on powerpc.
Will do. Thanks.
As regards the Fixes: tag, I guess it boils down to what we want or we
need to take for commit "riscv: Support membarrier private cmd". :-)
FWIW, a quick git-log search confirmed that MEMBARRIER has been around
for quite some time in the RISC-V world (though I'm not familiar with
any of its mainstream uses): commit 1464d00b27b2 says (at least) since
93917ad50972 ("RISC-V: Add support for restartable sequence"). I am
currently inclined to pick the latter commit (and check it w/ Palmer),
but other suggestions are welcome.
Andrea
next prev parent reply other threads:[~2023-11-29 18:29 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-27 10:32 [PATCH 0/2] membarrier: riscv: Provide core serializing command Andrea Parri
2023-11-27 10:32 ` [PATCH 1/2] locking: Introduce prepare_sync_core_cmd() Andrea Parri
2023-11-27 12:53 ` Mathieu Desnoyers
2023-11-27 10:32 ` [PATCH 2/2] membarrier: riscv: Provide core serializing command Andrea Parri
2023-11-27 13:28 ` Mathieu Desnoyers
2023-11-28 15:13 ` Andrea Parri
2023-11-28 18:39 ` Mathieu Desnoyers
2023-11-29 18:29 ` Andrea Parri [this message]
2023-11-29 20:00 ` Mathieu Desnoyers
2023-11-29 21:25 ` Andrea Parri
2023-11-29 21:32 ` Mathieu Desnoyers
2023-11-29 22:43 ` Andrea Parri
2023-12-06 13:05 ` Palmer Dabbelt
2023-12-06 14:11 ` Andrea Parri
2023-12-06 14:15 ` Palmer Dabbelt
2023-12-06 17:42 ` Andrea Parri
2023-12-06 17:56 ` Palmer Dabbelt
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