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Date: Wed, 9 Apr 2025 13:43:34 +0200
From: Ingo Molnar <mingo@kernel.org>
To: "Ahmed S. Darwish" <darwi@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	John Ogness <john.ogness@linutronix.de>, x86@kernel.org,
	x86-cpuid@lists.linux.dev, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v1 0/2] x86/cacheinfo: Fixes for CPUID(0x80000005) and
 CPUID(0x80000006)
Message-ID: <Z_ZdZpJqgeZ16Fwj@gmail.com>
References: <20250409105429.1048199-1-darwi@linutronix.de>
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* Ahmed S. Darwish <darwi@linutronix.de> wrote:

> Hi,
> 
> While working on the x86-cpuid-db CPUID model on top of the CPUID(2) and
> CPUID(4) cleanups at tip/x86/cpu,[*] I've discovered some L1/2/3 cache
> associativity parsing issues for the AMD CPUID(4) emulation logic .
> 
> Here are the fixes on top of -rc1.

Could you please send these against tip:master?

tip:x86/cpu already has your previous series, and I don't see the need 
to create a version skew between v6.15 and the x86 tree for v6.16.

Thanks,

	Ingo