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AJvYcCUQDRO9t6J6x8mAXWN04Nt+KZq5GDEJ+ApRDG2U017FeLZK9uIn2zjYTGsbgOUPuYcDPAct8K71k0pbp8E=@vger.kernel.org X-Gm-Message-State: AOJu0YwIzSevngfRWPApC3AVPodhFU6rI1X40xz1e5rCNYhkCBVk1sUr sqaM0xw1TgkG3U4V9OqTXRRY8z2wURPwk53y9VX5ayhTpWAjAeDSmjOvXPVP9vD/Wuk4Ha+2FJb BYA== X-Google-Smtp-Source: AGHT+IGWt+83fSC3c/N6JQbwOG/2CXc24wmCtoeKQKr6bofBcQejdMxPHdo+4k7C01b/9gYVsUy3Mw36Jn0= X-Received: from pfbhu1.prod.google.com ([2002:a05:6a00:6981:b0:737:30c9:fe46]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:cf82:b0:1f5:9431:46e7 with SMTP id adf61e73a8af0-201799984fcmr644100637.42.1744321601003; Thu, 10 Apr 2025 14:46:41 -0700 (PDT) Date: Thu, 10 Apr 2025 14:46:39 -0700 In-Reply-To: <20250324160617.15379-1-bp@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250324160617.15379-1-bp@kernel.org> Message-ID: Subject: Re: [PATCH] KVM: x86: Sort CPUID_8000_0021_EAX leaf bits properly From: Sean Christopherson To: Borislav Petkov Cc: Paolo Bonzini , X86 ML , KVM , LKML , "Borislav Petkov (AMD)" Content-Type: text/plain; charset="us-ascii" On Mon, Mar 24, 2025, Borislav Petkov wrote: > From: "Borislav Petkov (AMD)" > > WRMSR_XX_BASE_NS is bit 1 so put it there, add some new bits as > comments only. > > Signed-off-by: Borislav Petkov (AMD) > --- > arch/x86/kvm/cpuid.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 121edf1f2a79..e98ab18f784b 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -1160,6 +1160,7 @@ void kvm_set_cpu_caps(void) > > kvm_cpu_cap_init(CPUID_8000_0021_EAX, > F(NO_NESTED_DATA_BP), > + F(WRMSR_XX_BASE_NS), > /* > * Synthesize "LFENCE is serializing" into the AMD-defined entry > * in KVM's supported CPUID, i.e. if the feature is reported as > @@ -1173,10 +1174,14 @@ void kvm_set_cpu_caps(void) > SYNTHESIZED_F(LFENCE_RDTSC), > /* SmmPgCfgLock */ > F(NULL_SEL_CLR_BASE), > + /* UpperAddressIgnore */ > F(AUTOIBRS), > EMULATED_F(NO_SMM_CTL_MSR), > + /* FSRS */ > + /* FSRC */ I'm going to skip these, as they aren't yet publicly documented, and there are patches proposed to add actual support. I wouldn't care all that much if these didn't collide with Intel's version (the proposed patches name them AMD_FSxx). https://lore.kernel.org/all/20241204134345.189041-2-davydov-max@yandex-team.ru > /* PrefetchCtlMsr */ > - F(WRMSR_XX_BASE_NS), > + /* GpOnUserCpuid */ > + /* EPSF */ FWIW, this one's also not in the APM (though the only APM I can find is a year old), though it's in tools/x86/kcpuid. > SYNTHESIZED_F(SBPB), > SYNTHESIZED_F(IBPB_BRTYPE), > SYNTHESIZED_F(SRSO_NO), > -- > 2.43.0 >