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From: Niklas Cassel <cassel@kernel.org>
To: Dan Carpenter <dan.carpenter@linaro.org>
Cc: "Jingoo Han" <jingoohan1@gmail.com>,
	"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	kernel-janitors@vger.kernel.org
Subject: Re: [PATCH v2 2/2] PCI: dwc: Cleanup in dw_pcie_ep_raise_msi_irq()
Date: Fri, 19 Jan 2024 13:46:12 +0100	[thread overview]
Message-ID: <ZapvFNHnhppQkoys@x1-carbon> (raw)
In-Reply-To: <e231e268-d537-4613-a87c-876d99ea49e4@moroto.mountain>

On Fri, Jan 19, 2024 at 11:24:18AM +0300, Dan Carpenter wrote:
> The alignment code in dw_pcie_ep_raise_msix_irq() and
> dw_pcie_ep_raise_msi_irq() is quite similar.  I recently update the code
> in the former, so tweak the latter to match as well for consistency sake.
> 
> Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
> ---
> v2: Add this new patch
> 
> I wrote two versions of this, one where both patches were folded
> together and this one where the style tweaks are separated out into
> their own patch.  This is the better version.
> 
>  drivers/pci/controller/dwc/pcie-designware-ep.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 2b6607c23541..ccfc21cd0bb0 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -456,8 +456,8 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no,
>  	u32 msg_addr_lower, msg_addr_upper, reg;
>  	struct dw_pcie_ep_func *ep_func;
>  	struct pci_epc *epc = ep->epc;
> -	unsigned int aligned_offset;
>  	u16 msg_ctrl, msg_data;
> +	u64 aligned_offset;
>  	bool has_upper;
>  	u64 msg_addr;
>  	int ret;
> @@ -483,8 +483,8 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no,
>  		msg_data = dw_pcie_ep_readw_dbi(ep, func_no, reg);
>  	}
>  	aligned_offset = msg_addr_lower & (epc->mem->window.page_size - 1);
> -	msg_addr = ((u64)msg_addr_upper) << 32 |
> -			(msg_addr_lower & ~aligned_offset);
> +	msg_addr = ((u64)msg_addr_upper) << 32 | msg_addr_lower;
> +	msg_addr &= ~aligned_offset;
>  	ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr,
>  				  epc->mem->window.page_size);
>  	if (ret)
> -- 
> 2.43.0
> 

I like this change, but like Ilpo said, perhaps even cleaner with:
msg_addr = ((u64)msg_addr_upper) << 32 | msg_addr_lower;
msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size);

As we can remove the aligned_offset variable completely,
no need to even change the type.

(dw_pcie_ep_raise_msix_irq() would obviously only need the
second statement.)


Kind regards,
Niklas

  reply	other threads:[~2024-01-19 12:46 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-19  8:19 [PATCH v2 1/2] PCI: dwc: Fix a 64bit bug in dw_pcie_ep_raise_msix_irq() Dan Carpenter
2024-01-19  8:24 ` [PATCH v2 2/2] PCI: dwc: Cleanup in dw_pcie_ep_raise_msi_irq() Dan Carpenter
2024-01-19 12:46   ` Niklas Cassel [this message]
2024-01-19 11:30 ` [PATCH v2 1/2] PCI: dwc: Fix a 64bit bug in dw_pcie_ep_raise_msix_irq() Ilpo Järvinen

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