From: Tao Su <tao1.su@linux.intel.com>
To: Gerd Hoffmann <kraxel@redhat.com>
Cc: kvm@vger.kernel.org, Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<x86@kernel.org>, "H. Peter Anvin" <hpa@zytor.com>,
"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/3] kvm: wire up KVM_CAP_VM_GPA_BITS for x86
Date: Sat, 2 Mar 2024 00:13:24 +0800 [thread overview]
Message-ID: <ZeH+pPO7hhgDNujs@linux.bj.intel.com> (raw)
In-Reply-To: <20240301101410.356007-2-kraxel@redhat.com>
On Fri, Mar 01, 2024 at 11:14:07AM +0100, Gerd Hoffmann wrote:
> Add new guest_phys_bits field to kvm_caps, return the value to
> userspace when asked for KVM_CAP_VM_GPA_BITS capability.
>
> Initialize guest_phys_bits with boot_cpu_data.x86_phys_bits.
> Vendor modules (i.e. vmx and svm) can adjust this field in case
> additional restrictions apply, for example in case EPT has no
> support for 5-level paging.
>
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
> arch/x86/kvm/x86.h | 2 ++
> arch/x86/kvm/x86.c | 5 +++++
> 2 files changed, 7 insertions(+)
>
> diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
> index 2f7e19166658..e03aec3527f8 100644
> --- a/arch/x86/kvm/x86.h
> +++ b/arch/x86/kvm/x86.h
> @@ -24,6 +24,8 @@ struct kvm_caps {
> bool has_bus_lock_exit;
> /* notify VM exit supported? */
> bool has_notify_vmexit;
> + /* usable guest phys bits */
> + u32 guest_phys_bits;
>
> u64 supported_mce_cap;
> u64 supported_xcr0;
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 48a61d283406..e270b9b708d1 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -4784,6 +4784,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
> if (kvm_is_vm_type_supported(KVM_X86_SW_PROTECTED_VM))
> r |= BIT(KVM_X86_SW_PROTECTED_VM);
> break;
> + case KVM_CAP_VM_GPA_BITS:
> + r = kvm_caps.guest_phys_bits;
> + break;
> default:
> break;
> }
> @@ -9706,6 +9709,8 @@ static int __kvm_x86_vendor_init(struct kvm_x86_init_ops *ops)
> if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
> rdmsrl(MSR_IA32_ARCH_CAPABILITIES, host_arch_capabilities);
>
> + kvm_caps.guest_phys_bits = boot_cpu_data.x86_phys_bits;
When KeyID_bits is non-zero, MAXPHYADDR != boot_cpu_data.x86_phys_bits
here, you can check in detect_tme().
Thanks,
Tao
> +
> r = ops->hardware_setup();
> if (r != 0)
> goto out_mmu_exit;
> --
> 2.44.0
>
>
next prev parent reply other threads:[~2024-03-01 16:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20240301101410.356007-1-kraxel@redhat.com>
2024-03-01 10:14 ` [PATCH 1/3] kvm: wire up KVM_CAP_VM_GPA_BITS for x86 Gerd Hoffmann
2024-03-01 16:13 ` Tao Su [this message]
2024-03-04 8:43 ` Gerd Hoffmann
2024-03-04 8:59 ` Tao Su
2024-03-04 11:47 ` Gerd Hoffmann
2024-03-04 15:15 ` Sean Christopherson
2024-03-05 2:59 ` Xiaoyao Li
2024-03-01 10:14 ` [PATCH 2/3] kvm/vmx: limit guest_phys_bits to 48 without 5-level ept Gerd Hoffmann
2024-03-01 10:14 ` [PATCH 3/3] kvm/svm: limit guest_phys_bits to 48 in 4-level paging mode Gerd Hoffmann
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