Re: [PATCH 05/26] cxl/core: Simplify cxl_dpa_set_mode()

Dave Jiang
2024-03-26T17:47:01Z

On 3/24/24 4:18 PM, Ira Weiny wrote:
> cxl_dpa_set_mode() checks the mode for validity two times, once outside
> of the DPA RW semaphore and again within. The function is not in a
> critical path. Prior to Dynamic Capacity the extra check was not much
> of an issue. The addition of DC modes increases the complexity of
> the check.
>
> Simplify the mode check before adding the more complex DC modes.

I would augment this by saying simplify "by using scope-based resource menagement".
>
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>

Reviewed-by: Dave Jiang <dave.jiang@intel.com>
>
> ---
> Changes for v1:
> [iweiny: new patch]
> [Jonathan: based on getting rid of the loop in cxl_dpa_set_mode]
> [Jonathan: standardize on resource_size() == 0]
> ---
> drivers/cxl/core/hdm.c | 45 ++++++++++++++++++---------------------------
> 1 file changed, 18 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
> index 7d97790b893d..66b8419fd0c3 100644
> --- a/drivers/cxl/core/hdm.c
> +++ b/drivers/cxl/core/hdm.c
> @@ -411,44 +411,35 @@ int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled,
> struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
> struct cxl_dev_state *cxlds = cxlmd->cxlds;
> struct device *dev = &cxled->cxld.dev;
> - int rc;
>
> + guard(rwsem_write)(&cxl_dpa_rwsem);
> + if (cxled->cxld.flags & CXL_DECODER_F_ENABLE)
> + return -EBUSY;
> +
> + /*
> + * Check that the mode is supported by the current partition
> + * configuration
> + */
> switch (mode) {
> case CXL_DECODER_RAM:
> + if (!resource_size(&cxlds->ram_res)) {
> + dev_dbg(dev, "no available ram capacity\n");
> + return -ENXIO;
> + }
> + break;
> case CXL_DECODER_PMEM:
> + if (!resource_size(&cxlds->pmem_res)) {
> + dev_dbg(dev, "no available pmem capacity\n");
> + return -ENXIO;
> + }
> break;
> default:
> dev_dbg(dev, "unsupported mode: %d\n", mode);
> return -EINVAL;
> }
>
> - down_write(&cxl_dpa_rwsem);
> - if (cxled->cxld.flags & CXL_DECODER_F_ENABLE) {
> - rc = -EBUSY;
> - goto out;
> - }
> -
> - /*
> - * Only allow modes that are supported by the current partition
> - * configuration
> - */
> - if (mode == CXL_DECODER_PMEM && !resource_size(&cxlds->pmem_res)) {
> - dev_dbg(dev, "no available pmem capacity\n");
> - rc = -ENXIO;
> - goto out;
> - }
> - if (mode == CXL_DECODER_RAM && !resource_size(&cxlds->ram_res)) {
> - dev_dbg(dev, "no available ram capacity\n");
> - rc = -ENXIO;
> - goto out;
> - }
> -
> cxled->mode = mode;
> - rc = 0;
> -out:
> - up_write(&cxl_dpa_rwsem);
> -
> - return rc;
> + return 0;
> }
>
> int cxl_dpa_alloc(struct cxl_endpoint_decoder *cxled, unsigned long long size)
>