From: Sean Christopherson <seanjc@google.com>
To: Xi Ruoyao <xry111@xry111.site>
Cc: Dave Hansen <dave.hansen@linux.intel.com>,
Michael Kelley <mhklinux@outlook.com>,
Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
Andy Lutomirski <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
"H. Peter Anvin" <hpa@zytor.com>,
x86@kernel.org, linux-kernel@vger.kernel.org,
Andrew Cooper <andrew.cooper3@citrix.com>
Subject: Re: [PATCH v8 2/2] x86/mm: Don't disable PCID if the kernel is running on a hypervisor
Date: Tue, 16 Apr 2024 16:49:42 -0700 [thread overview]
Message-ID: <Zh8Oli5MIyekLrbu@google.com> (raw)
In-Reply-To: <20240413044129.52812-2-xry111@xry111.site>
On Sat, Apr 13, 2024, Xi Ruoyao wrote:
> The Intel erratum for "incomplete Global INVLPG flushes" says:
>
> This erratum does not apply in VMX non-root operation. It applies
> only when PCIDs are enabled and either in VMX root operation or
> outside VMX operation.
>
> So if the kernel is running in a hypervisor, we are in VMX non-root
> operation and we should be safe to use PCID.
>
> Cc: Dave Hansen <dave.hansen@linux.intel.com>
> Cc: Michael Kelley <mhklinux@outlook.com>
> Cc: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
> Cc: Sean Christopherson <seanjc@google.com>
> Cc: Andrew Cooper <andrew.cooper3@citrix.com>
> Link: https://lore.kernel.org/all/168436059559.404.13934972543631851306.tip-bot2@tip-bot2/
> Link: https://cdrdv2.intel.com/v1/dl/getContent/740518 # RPL042, rev. 13
> Link: https://cdrdv2.intel.com/v1/dl/getContent/682436 # ADL063, rev. 24
> Signed-off-by: Xi Ruoyao <xry111@xry111.site>
> ---
> arch/x86/mm/init.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
> index c318cdc35467..6010f86c5acd 100644
> --- a/arch/x86/mm/init.c
> +++ b/arch/x86/mm/init.c
> @@ -275,6 +275,14 @@ static void __init probe_page_size_mask(void)
> * microcode is not updated to fix the issue.
> */
> static const struct x86_cpu_id invlpg_miss_ids[] = {
> + /* Only bare-metal is affected. PCIDs in guests are OK. */
> + {
> + .vendor = X86_VENDOR_INTEL,
> + .family = 6,
> + .model = INTEL_FAM6_ANY,
> + .feature = X86_FEATURE_HYPERVISOR,
Isn't this inverted? x86_match_cpu() will return NULL if the CPU doesn't have
HYPERVISOR. We want it to return NULL if the CPU *does* have HYPERVISOR.
> + .driver_data = 0,
> + },
> INTEL_MATCH(INTEL_FAM6_ALDERLAKE, 0x2e),
> INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L, 0x42c),
> INTEL_MATCH(INTEL_FAM6_ATOM_GRACEMONT, 0x11),
> --
> 2.44.0
>
next prev parent reply other threads:[~2024-04-16 23:49 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-13 4:41 [PATCH v8 1/2] x86/mm: Don't disable PCID if "incomplete Global INVLPG flushes" is fixed by microcode Xi Ruoyao
2024-04-13 4:41 ` [PATCH v8 2/2] x86/mm: Don't disable PCID if the kernel is running on a hypervisor Xi Ruoyao
2024-04-16 23:49 ` Sean Christopherson [this message]
2024-04-17 8:01 ` Xi Ruoyao
2024-04-17 17:22 ` Pawan Gupta
2024-04-17 17:25 ` Dave Hansen
2024-04-17 18:23 ` Sean Christopherson
2024-04-17 18:26 ` Xi Ruoyao
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