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charset=utf-8 Content-Disposition: inline In-Reply-To: <01b9b16b2f86f4d16d9871a29dcda9245512a1f7.1714894086.git.christophe.jaillet@wanadoo.fr> X-Sent-From: Pengutronix Hildesheim X-URL: http://www.pengutronix.de/ X-Accept-Language: de,en X-Accept-Content-Type: text/plain X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: mtr@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org On Sun, 05 May 2024 09:28:25 +0200, Christophe JAILLET wrote: > 'allegro_regmap_config' and 'allegro_sram_config' are not modified in this > diver and are only used as a const struct regmap_config. > > Constifying these structures moves some data to a read-only section, so > increase overall security. > > On a x86_64, with allmodconfig: > Before: > text data bss dec hex filename > 79587 3706 116 83409 145d1 drivers/media/platform/allegro-dvt/allegro-core.o > > After: > text data bss dec hex filename > 80219 3066 116 83401 145c9 drivers/media/platform/allegro-dvt/allegro-core.o > > Signed-off-by: Christophe JAILLET Reviewed-by: Michael Tretter > --- > drivers/media/platform/allegro-dvt/allegro-core.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/media/platform/allegro-dvt/allegro-core.c b/drivers/media/platform/allegro-dvt/allegro-core.c > index da61f9beb6b4..1a19fef62e81 100644 > --- a/drivers/media/platform/allegro-dvt/allegro-core.c > +++ b/drivers/media/platform/allegro-dvt/allegro-core.c > @@ -179,7 +179,7 @@ struct allegro_dev { > struct list_head channels; > }; > > -static struct regmap_config allegro_regmap_config = { > +static const struct regmap_config allegro_regmap_config = { > .name = "regmap", > .reg_bits = 32, > .val_bits = 32, > @@ -188,7 +188,7 @@ static struct regmap_config allegro_regmap_config = { > .cache_type = REGCACHE_NONE, > }; > > -static struct regmap_config allegro_sram_config = { > +static const struct regmap_config allegro_sram_config = { > .name = "sram", > .reg_bits = 32, > .val_bits = 32, > -- > 2.45.0 > >