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DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,imap1.dmz-prg2.suse.org:rdns,suse.de:dkim] On Fri, May 17, 2024 at 09:00:09PM +0200, Christophe Leroy wrote: > In order to allow leaf PMD entries, switch the PGD to 64 bits entries. > > Signed-off-by: Christophe Leroy I do not quite understand this change. Are not powerE500 and power85xx two different things? You are changing making it 64 for PPC_E500_64bits, but you are updating head_85xx. Are they sharing this code? Also, we would benefit from a slightly bigger changelog, explaining why do we need this change in some more detail. > diff --git a/arch/powerpc/include/asm/pgtable-types.h b/arch/powerpc/include/asm/pgtable-types.h > index 082c85cc09b1..db965d98e0ae 100644 > --- a/arch/powerpc/include/asm/pgtable-types.h > +++ b/arch/powerpc/include/asm/pgtable-types.h > @@ -49,7 +49,11 @@ static inline unsigned long pud_val(pud_t x) > #endif /* CONFIG_PPC64 */ > > /* PGD level */ > +#if defined(CONFIG_PPC_E500) && defined(CONFIG_PTE_64BIT) > +typedef struct { unsigned long long pgd; } pgd_t; > +#else > typedef struct { unsigned long pgd; } pgd_t; > +#endif > #define __pgd(x) ((pgd_t) { (x) }) > static inline unsigned long pgd_val(pgd_t x) > { > diff --git a/arch/powerpc/kernel/head_85xx.S b/arch/powerpc/kernel/head_85xx.S > index 39724ff5ae1f..a305244afc9f 100644 > --- a/arch/powerpc/kernel/head_85xx.S > +++ b/arch/powerpc/kernel/head_85xx.S > @@ -307,8 +307,9 @@ set_ivor: > #ifdef CONFIG_PTE_64BIT > #ifdef CONFIG_HUGETLB_PAGE > #define FIND_PTE \ > - rlwinm r12, r10, 13, 19, 29; /* Compute pgdir/pmd offset */ \ > - lwzx r11, r12, r11; /* Get pgd/pmd entry */ \ > + rlwinm r12, r10, 14, 18, 28; /* Compute pgdir/pmd offset */ \ > + add r12, r11, r12; You add the offset to pgdir? > + lwz r11, 4(r12); /* Get pgd/pmd entry */ \ What is i offset 4? -- Oscar Salvador SUSE Labs