From: Mark Rutland <mark.rutland@arm.com>
To: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Marc Zyngier <maz@kernel.org>,
linux-arm-kernel@lists.infradead.org, ryan.roberts@arm.com,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64/mm: Drop ESR_ELx_FSC_TYPE
Date: Mon, 17 Jun 2024 10:34:01 +0100 [thread overview]
Message-ID: <ZnACqAtt549JXGD-@J2N7QTR9R3> (raw)
In-Reply-To: <cea3ced2-b8b3-426b-8c40-a47881a5bff6@arm.com>
On Mon, Jun 17, 2024 at 02:09:27PM +0530, Anshuman Khandual wrote:
> On 6/17/24 13:13, Marc Zyngier wrote:
> > On Mon, 17 Jun 2024 04:15:40 +0100,
> > Anshuman Khandual <anshuman.khandual@arm.com> wrote:
> >>
> >> Does the following re-worked patch looks okay ? Earlier set_thread_esr() changes
> >> can be dropped from arch/arm64/mm/fault.c and also the original commit message
> >> still makes sense.
> >>
> >> diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h
> >> index 7abf09df7033..6cd13ac61005 100644
> >> --- a/arch/arm64/include/asm/esr.h
> >> +++ b/arch/arm64/include/asm/esr.h
> >> @@ -121,6 +121,13 @@
> >> #define ESR_ELx_FSC_SECC (0x18)
> >> #define ESR_ELx_FSC_SECC_TTW(n) (0x1c + (n))
> >>
> >> +/* Status codes for individual page table levels */
> >> +#define ESR_ELx_FSC_ACCESS_L(n) (ESR_ELx_FSC_ACCESS + n)
> >> +#define ESR_ELx_FSC_FAULT_nL (0x2C)
> >> +#define ESR_ELx_FSC_FAULT_L(n) (((n) < 0 ? ESR_ELx_FSC_FAULT_nL : \
> >> + ESR_ELx_FSC_FAULT) + (n))
> >> +#define ESR_ELx_FSC_PERM_L(n) (ESR_ELx_FSC_PERM + n)
> >> +
> >> /* ISS field definitions for Data Aborts */
> >> #define ESR_ELx_ISV_SHIFT (24)
> >> #define ESR_ELx_ISV (UL(1) << ESR_ELx_ISV_SHIFT)
> >> @@ -388,20 +395,33 @@ static inline bool esr_is_data_abort(unsigned long esr)
> >>
> >> static inline bool esr_fsc_is_translation_fault(unsigned long esr)
> >> {
> >> - /* Translation fault, level -1 */
> >> - if ((esr & ESR_ELx_FSC) == 0b101011)
> >> - return true;
> >> - return (esr & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_FAULT;
> >> + esr = esr & ESR_ELx_FSC;
> >> +
> >> + return (esr == ESR_ELx_FSC_FAULT_L(3)) ||
> >> + (esr == ESR_ELx_FSC_FAULT_L(2)) ||
> >> + (esr == ESR_ELx_FSC_FAULT_L(1)) ||
> >> + (esr == ESR_ELx_FSC_FAULT_L(0)) ||
> >> + (esr == ESR_ELx_FSC_FAULT_L(-1));
> >> }
> >>
> >> static inline bool esr_fsc_is_permission_fault(unsigned long esr)
> >> {
> >> - return (esr & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_PERM;
> >> + esr = esr & ESR_ELx_FSC;
> >> +
> >> + return (esr == ESR_ELx_FSC_PERM_L(3)) ||
> >> + (esr == ESR_ELx_FSC_PERM_L(2)) ||
> >> + (esr == ESR_ELx_FSC_PERM_L(1)) ||
> >> + (esr == ESR_ELx_FSC_PERM_L(0));
> >> }
> >>
> >> static inline bool esr_fsc_is_access_flag_fault(unsigned long esr)
> >> {
> >> - return (esr & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_ACCESS;
> >> + esr = esr & ESR_ELx_FSC;
> >> +
> >> + return (esr == ESR_ELx_FSC_ACCESS_L(3)) ||
> >> + (esr == ESR_ELx_FSC_ACCESS_L(2)) ||
> >> + (esr == ESR_ELx_FSC_ACCESS_L(1)) ||
> >> + (esr == ESR_ELx_FSC_ACCESS_L(0));
> >> }
> >>
> >> /* Indicate whether ESR.EC==0x1A is for an ERETAx instruction */
> >
> > This looks better indeed.
>
> Thanks Marc.
>
> Hello Mark/Ryan,
>
> Could I still keep your tags for the patch, or it's better to just
> drop them as there are some new changes being folded in. Please do
> advise. Thank you.
Just drop them for now -- we can easily reply with new tags (and I
probably will, as the above looks sane to me).
Mark.
prev parent reply other threads:[~2024-06-17 9:34 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-13 9:45 [PATCH] arm64/mm: Drop ESR_ELx_FSC_TYPE Anshuman Khandual
2024-06-13 10:03 ` Ryan Roberts
2024-06-13 10:06 ` Mark Rutland
2024-06-13 11:23 ` Marc Zyngier
2024-06-14 2:24 ` Anshuman Khandual
2024-06-14 10:37 ` Marc Zyngier
2024-06-17 3:15 ` Anshuman Khandual
2024-06-17 7:43 ` Marc Zyngier
2024-06-17 8:39 ` Anshuman Khandual
2024-06-17 9:34 ` Mark Rutland [this message]
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