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charset=us-ascii Content-Disposition: inline In-Reply-To: <4a1e8cc5-5d82-435d-8a2a-5fab56f85965@linaro.org> On 24-06-18 13:06:34, Konrad Dybcio wrote: > > > On 6/14/24 12:50, Abel Vesa wrote: > > From: Rajendra Nayak > > > > Add tsens and thermal zones nodes for x1e80100 SoC. > > > > Signed-off-by: Rajendra Nayak > > Signed-off-by: Abel Vesa > > --- > > [...] > > > + tsens0: thermal-sensor@c271000 { > > + compatible = "qcom,x1e80100-tsens", "qcom,tsens-v2"; > > + reg = <0 0x0c271000 0 0x1000>, > > + <0 0x0c222000 0 0x1000>; > > + > > + interrupts = , > > + ; > > These are normally wired up through PDC so that the system can shut down > even if CPUSS is off The upper-lower one is wired through PDC, but the critical doesn't seem it is. > > [...] > > > + cpu0-0-top-thermal { > > + thermal-sensors = <&tsens0 1>; > > Here you have passive trip points with no passive polling, this will > only report threshold crossing events (so e.g. cpufreq throttling will > be broken) > Sure, will add with 250 value for all cpu per-core sensors. > > + > > + trips { > > + trip-point0 { > > + temperature = <90000>; > > + hysteresis = <2000>; > > + type = "passive"; > > + }; > > + > > + trip-point1 { > > + temperature = <95000>; > > + hysteresis = <2000>; > > + type = "passive"; > > + }; > > + > > + cpu-critical { > > + temperature = <110000>; > > + hysteresis = <1000>; > > + type = "critical"; > > + }; > > + }; > > + }; > > + > > [...] > > > > + > > + nsp1-thermal { > > + polling-delay-passive = <10>; > > Here you have passive polling, but no passive trip point > Will drop the passive polling delay.. > > + > > + thermal-sensors = <&tsens3 2>; > > + > > + trips { > > + trip-point0 { > > + temperature = <90000>; > > + hysteresis = <2000>; > > + type = "hot"; > > + }; > > + > > + nsp1-critical { > > + temperature = <125000>; > > + hysteresis = <0>; > > + type = "critical"; > > + }; > > + }; > > + }; > > > The rest looks okayish > > Konrad