From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org
Subject: Re: [PATCH fixes 1/4] MIPS: mipsmtregs: Fix target register for MFTC0
Date: Fri, 21 Jun 2024 10:25:48 +0200 [thread overview]
Message-ID: <ZnU5DGtw7aeZUtJ0@alpha.franken.de> (raw)
In-Reply-To: <20240616-mips-mt-fixes-v1-1-83913e0e60fc@flygoat.com>
On Sun, Jun 16, 2024 at 02:25:02PM +0100, Jiaxun Yang wrote:
> Target register of mftc0 should be __res instead of $1, this is
> a leftover from old .insn code.
>
> Fixes: dd6d29a61489 ("MIPS: Implement microMIPS MT ASE helpers")
> Cc: stable@vger.kernel.org
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
> arch/mips/include/asm/mipsmtregs.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/include/asm/mipsmtregs.h b/arch/mips/include/asm/mipsmtregs.h
> index 30e86861c206..b1ee3c48e84b 100644
> --- a/arch/mips/include/asm/mipsmtregs.h
> +++ b/arch/mips/include/asm/mipsmtregs.h
> @@ -322,7 +322,7 @@ static inline void ehb(void)
> " .set push \n" \
> " .set "MIPS_ISA_LEVEL" \n" \
> _ASM_SET_MFTC0 \
> - " mftc0 $1, " #rt ", " #sel " \n" \
> + " mftc0 %0, " #rt ", " #sel " \n" \
> _ASM_UNSET_MFTC0 \
> " .set pop \n" \
> : "=r" (__res)); \
>
> --
> 2.43.0
applied to mips-fixes.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
next prev parent reply other threads:[~2024-06-21 8:26 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-16 13:25 [PATCH fixes 0/4] MIPS: MT ASE fixes Jiaxun Yang
2024-06-16 13:25 ` [PATCH fixes 1/4] MIPS: mipsmtregs: Fix target register for MFTC0 Jiaxun Yang
2024-06-19 11:32 ` Jiaxun Yang
2024-06-19 11:37 ` Jiaxun Yang
2024-06-20 14:43 ` Thomas Bogendoerfer
2024-06-21 8:25 ` Thomas Bogendoerfer [this message]
2024-06-16 13:25 ` [PATCH fixes 2/4] MIPS: asmmacro: Fix MT ASE macros Jiaxun Yang
2024-06-16 13:25 ` [PATCH fixes 3/4] MIPS: cps-vec: Replace MT instructions with macros Jiaxun Yang
2024-06-27 9:00 ` Thomas Bogendoerfer
2024-06-27 11:14 ` Jiaxun Yang
2024-06-27 19:51 ` Maciej W. Rozycki
2024-06-28 0:36 ` Jiaxun Yang
2024-06-16 13:25 ` [PATCH fixes 4/4] MIPS: Use toolchain MT ASE support whenever possible Jiaxun Yang
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