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From: Sean Christopherson <seanjc@google.com>
To: Reinette Chatre <reinette.chatre@intel.com>
Cc: isaku.yamahata@intel.com, pbonzini@redhat.com,
	erdemaktas@google.com,  vkuznets@redhat.com,
	vannapurve@google.com, jmattson@google.com,  mlevitsk@redhat.com,
	xiaoyao.li@intel.com, chao.gao@intel.com,
	 rick.p.edgecombe@intel.com, yuan.yao@intel.com,
	kvm@vger.kernel.org,  linux-kernel@vger.kernel.org
Subject: Re: [PATCH V9 0/2] KVM: x86: Make bus clock frequency for vAPIC timer configurable
Date: Wed, 10 Jul 2024 08:42:22 -0700	[thread overview]
Message-ID: <Zo6r3if6rTERxnwl@google.com> (raw)
In-Reply-To: <5354a7ae-ca32-42fe-9231-a0d955bc8675@intel.com>

On Fri, Jun 28, 2024, Reinette Chatre wrote:
> Hi Sean,
> 
> On 6/28/24 3:55 PM, Sean Christopherson wrote:
> > On Wed, 12 Jun 2024 11:16:10 -0700, Reinette Chatre wrote:
> > > Changes from v8:
> > > - v8: https://lore.kernel.org/lkml/cover.1718043121.git.reinette.chatre@intel.com/
> > > - Many changes to new udelay() utility patch as well as the APIC bus
> > >    frequency test aimed to make it more robust (additional ASSERTs,
> > >    consistent types, eliminate duplicate code, etc.) and useful with
> > >    support for more user configuration. Please refer to individual patches for
> > >    detailed changes.
> > > - Series applies cleanly to next branch of kvm-x86 with HEAD
> > >    e4e9e1067138e5620cf0500c3e5f6ebfb9d322c8.
> > > 
> > > [...]
> > 
> > Applied to kvm-x86 misc, with all the changes mentioned in my earlier replies.
> > I'm out next week, and don't want to merge the KVM changes without these tests,
> > hence the rushed application.
> > 
> > Please holler if you disagree with anything (or if I broke something).  I won't
> > respond until July 8th at the earliest, but worst case scenario we can do fixup
> > patches after 6.11-rc1.
> 
> Thank you very much for taking the time to make the changes and apply the patches.
> All the changes look good to me and passes my testing.
> 
> Now that the x86 udelay() utility no longer use cpu_relax(), should ARM
> and RISC-V's udelay() be modified to match in this regard? I can prepare
> (unable to test) changes for you to consider on your return.

I don't think so?  IIUC, arm64's "yield", used by cpu_relax() doesn't trigger the
"on spin" exists.  Such exist are only triggered by "wfet" and friends.

  reply	other threads:[~2024-07-10 15:42 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-12 18:16 [PATCH V9 0/2] KVM: x86: Make bus clock frequency for vAPIC timer configurable Reinette Chatre
2024-06-12 18:16 ` [PATCH V9 1/2] KVM: selftests: Add x86_64 guest udelay() utility Reinette Chatre
2024-06-28 22:46   ` Sean Christopherson
2024-06-12 18:16 ` [PATCH V9 2/2] KVM: selftests: Add test for configure of x86 APIC bus frequency Reinette Chatre
2024-06-28 22:50   ` Sean Christopherson
2024-06-29  0:39   ` VMX Preemption Timer appears to be buggy on SKX, CLX, and ICX Sean Christopherson
2024-07-03 20:14     ` Reinette Chatre
2024-07-03 21:37       ` Reinette Chatre
2024-07-08  5:55       ` Yuan Yao
2024-06-28 22:55 ` [PATCH V9 0/2] KVM: x86: Make bus clock frequency for vAPIC timer configurable Sean Christopherson
2024-06-29  0:10   ` Reinette Chatre
2024-07-10 15:42     ` Sean Christopherson [this message]
2024-07-10 17:14       ` Reinette Chatre

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