Re: [PATCH 1/1] arch/x86/microcode/intel: Remove unnecessary cache writeback and invalidation

Chang S. Bae
2024-09-10T18:36:03Z

On 7/1/2024 2:20 PM, Chang S. Bae wrote:
>
> Additionally, the side effects of doing this have been overlooked. It
> extends the CPU rendezvous time for late loading. The cache flush takes
> about 1x to 3.5x more time than needed for updating the microcode.

To provide more context, the latency impact was found to be more adverse
when late loading was staged using the new loading feature [1]. Its
enabling patch set will be posted once the specification is updated,
likely after the upcoming merge window. I will include this fix (v2) as
part of the series.

Thanks,
Chang

[1]: https://cdrdv2.intel.com/v1/dl/getContent/782715