[PATCH RFC net-next v2 09/17] net: stmmac: Introduce mac_device_info::priv pointer

[PATCH RFC net-next v2 09/17] net: stmmac: Introduce mac_device_info::priv pointer

[Serge Semin]

There is going to be introduced an PCS-specific CSR space pointer defined
in the stmmac_priv structure nearby the mmcaddr, estaddr and ptpaddr
fields. In order to have that pointer accessible from the PCS-specific
callback, let's introduce pointer to stmmac_priv defined in the
mac_device_info structure.

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>

---

Note the better approach would be to convert the mac_device_info instance
to being embedded into the stmmac_priv structure. It would have solved
many driver problems like non-unified HW abstraction interface, duplicated
fields (ioaddr and pcsr, etc) or too many non-runtime parameters passed to
the callbacks, etc. But the change also would have been much-much more
invasive than this one is. If despite of that you find the mac_device_info
embedding into stmmac_priv more appropriate (as I do), then I'll provide
the respective patch in place of this one.
---
 drivers/net/ethernet/stmicro/stmmac/common.h | 1 +
 drivers/net/ethernet/stmicro/stmmac/hwif.c   | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
index a66b836996d6..f7661268518f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -580,6 +580,7 @@ struct mii_regs {
 };
 
 struct mac_device_info {
+	struct stmmac_priv *priv;
 	const struct stmmac_ops *mac;
 	const struct stmmac_desc_ops *desc;
 	const struct stmmac_dma_ops *dma;
diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.c b/drivers/net/ethernet/stmicro/stmmac/hwif.c
index 29367105df54..84fd57b76fad 100644
--- a/drivers/net/ethernet/stmicro/stmmac/hwif.c
+++ b/drivers/net/ethernet/stmicro/stmmac/hwif.c
@@ -351,6 +351,7 @@ int stmmac_hwif_init(struct stmmac_priv *priv)
 		mac->tc = mac->tc ? : entry->tc;
 		mac->mmc = mac->mmc ? : entry->mmc;
 		mac->est = mac->est ? : entry->est;
+		mac->priv = priv;
 
 		priv->hw = mac;
 		priv->ptpaddr = priv->ioaddr + entry->regs.ptp_off;
-- 
2.43.0

[PATCH RFC net-next v2 10/17] net: stmmac: Introduce internal PCS offset-based CSR access

[Serge Semin]

Internal PCS module can be found on the DW GMAC v3.x and DW QoS Eth
IP-cores. The register space is almost identical except the base address
and the SGMII/RGMII/SMII Control and Status Register layout. Thus the
common PCS code could be set free from passing the PCS CSRs base address
by using the base calcultaed on the MAC-device info init stage. The same
approach has been utilized in the STMMAC MMC, PTP and EST modules.

Let's convert the PCS module to using it too by adding the PCS CSRs offset
declarations and the CSRs base address calculation for the detected
IP-core.

While at it replace the GMAC_ prefix with PCS_ to mark the common STMMAC
PCS macros in the same way as it's done in the mmc.h, stmmac_ptp.h and
stmmac_est.h for the respective common modules.

Note the phylink_pcs_ops instance has been defined empty for now. It will
be populated later upon the rest of the PCS-code movement to the
stmmac_pcs.c module.

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
---
 .../stmicro/stmmac/dwmac-qcom-ethqos.c        |  8 +-
 .../ethernet/stmicro/stmmac/dwmac1000_core.c  | 11 ++-
 .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 12 +--
 drivers/net/ethernet/stmicro/stmmac/hwif.c    | 14 ++++
 drivers/net/ethernet/stmicro/stmmac/hwif.h    |  4 +-
 drivers/net/ethernet/stmicro/stmmac/stmmac.h  |  1 +
 .../net/ethernet/stmicro/stmmac/stmmac_pcs.c  | 30 ++++---
 .../net/ethernet/stmicro/stmmac/stmmac_pcs.h  | 79 +++++++++----------
 8 files changed, 89 insertions(+), 70 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
index 80eb72bc6311..d0bcebe87ee8 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
@@ -633,7 +633,7 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
 			      RGMII_CONFIG2_RGMII_CLK_SEL_CFG,
 			      RGMII_IO_MACRO_CONFIG2);
 		ethqos_set_serdes_speed(ethqos, SPEED_2500);
-		stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 0, 0, 0);
+		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 0, 0, 0);
 		break;
 	case SPEED_1000:
 		val &= ~ETHQOS_MAC_CTRL_PORT_SEL;
@@ -641,12 +641,12 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
 			      RGMII_CONFIG2_RGMII_CLK_SEL_CFG,
 			      RGMII_IO_MACRO_CONFIG2);
 		ethqos_set_serdes_speed(ethqos, SPEED_1000);
-		stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0);
+		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 1, 0, 0);
 		break;
 	case SPEED_100:
 		val |= ETHQOS_MAC_CTRL_PORT_SEL | ETHQOS_MAC_CTRL_SPEED_MODE;
 		ethqos_set_serdes_speed(ethqos, SPEED_1000);
-		stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0);
+		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 1, 0, 0);
 		break;
 	case SPEED_10:
 		val |= ETHQOS_MAC_CTRL_PORT_SEL;
@@ -656,7 +656,7 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
 					 SGMII_10M_RX_CLK_DVDR),
 			      RGMII_IO_MACRO_CONFIG);
 		ethqos_set_serdes_speed(ethqos, SPEED_1000);
-		stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0);
+		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 1, 0, 0);
 		break;
 	}
 
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index 3ba65ea3e46f..e525b92955b4 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -296,7 +296,7 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,
 			x->irq_rx_path_exit_lpi_mode_n++;
 	}
 
-	dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);
+	dwmac_pcs_isr(hw->priv->pcsaddr, intr_status, x);
 
 	if (intr_status & PCS_RGSMIIIS_IRQ) {
 		/* TODO Dummy-read to clear the IRQ status */
@@ -365,10 +365,10 @@ static void dwmac1000_set_eee_timer(struct mac_device_info *hw, int ls, int tw)
 	writel(value, ioaddr + LPI_TIMER_CTRL);
 }
 
-static void dwmac1000_ctrl_ane(void __iomem *ioaddr, bool ane, bool srgmi_ral,
+static void dwmac1000_ctrl_ane(void __iomem *pcsaddr, bool ane, bool srgmi_ral,
 			       bool loopback)
 {
-	dwmac_ctrl_ane(ioaddr, GMAC_PCS_BASE, ane, srgmi_ral, loopback);
+	dwmac_ctrl_ane(pcsaddr, ane, srgmi_ral, loopback);
 }
 
 static int dwmac1000_mii_pcs_validate(struct phylink_pcs *pcs,
@@ -414,8 +414,7 @@ static int dwmac1000_mii_pcs_config(struct phylink_pcs *pcs,
 {
 	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
 
-	return dwmac_pcs_config(hw, neg_mode, interface, advertising,
-				GMAC_PCS_BASE);
+	return dwmac_pcs_config(hw, neg_mode, advertising, advertising);
 }
 
 static void dwmac1000_mii_pcs_get_state(struct phylink_pcs *pcs,
@@ -442,7 +441,7 @@ static void dwmac1000_mii_pcs_get_state(struct phylink_pcs *pcs,
 	state->duplex = status & GMAC_RGSMIIIS_LNKMOD_MASK ?
 			DUPLEX_FULL : DUPLEX_HALF;
 
-	dwmac_pcs_get_state(hw, state, GMAC_PCS_BASE);
+	dwmac_pcs_get_state(hw, state);
 }
 
 static const struct phylink_pcs_ops dwmac1000_mii_pcs_ops = {
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 5cf2a6cb8f66..e51c95732bad 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -750,10 +750,10 @@ static void dwmac4_flow_ctrl(struct mac_device_info *hw, unsigned int duplex,
 	}
 }
 
-static void dwmac4_ctrl_ane(void __iomem *ioaddr, bool ane, bool srgmi_ral,
+static void dwmac4_ctrl_ane(void __iomem *pcsaddr, bool ane, bool srgmi_ral,
 			    bool loopback)
 {
-	dwmac_ctrl_ane(ioaddr, GMAC_PCS_BASE, ane, srgmi_ral, loopback);
+	dwmac_ctrl_ane(pcsaddr, ane, srgmi_ral, loopback);
 }
 
 static int dwmac4_mii_pcs_validate(struct phylink_pcs *pcs,
@@ -798,8 +798,7 @@ static int dwmac4_mii_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
 {
 	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
 
-	return dwmac_pcs_config(hw, neg_mode, interface, advertising,
-				GMAC_PCS_BASE);
+	return dwmac_pcs_config(hw, advertising, interface, advertising);
 }
 
 static void dwmac4_mii_pcs_get_state(struct phylink_pcs *pcs,
@@ -833,7 +832,7 @@ static void dwmac4_mii_pcs_get_state(struct phylink_pcs *pcs,
 	state->duplex = status & GMAC_PHYIF_CTRLSTATUS_LNKMOD_MASK ?
 			DUPLEX_FULL : DUPLEX_HALF;
 
-	dwmac_pcs_get_state(hw, state, GMAC_PCS_BASE);
+	dwmac_pcs_get_state(hw, state);
 }
 
 static const struct phylink_pcs_ops dwmac4_mii_pcs_ops = {
@@ -924,7 +923,8 @@ static int dwmac4_irq_status(struct mac_device_info *hw,
 			x->irq_rx_path_exit_lpi_mode_n++;
 	}
 
-	dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);
+	dwmac_pcs_isr(hw->priv->pcsaddr, intr_status, x);
+
 	if (intr_status & PCS_RGSMIIIS_IRQ) {
 		/* TODO Dummy-read to clear the IRQ status */
 		readl(ioaddr + GMAC_PHYIF_CONTROL_STATUS);
diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.c b/drivers/net/ethernet/stmicro/stmmac/hwif.c
index 84fd57b76fad..3666893acb69 100644
--- a/drivers/net/ethernet/stmicro/stmmac/hwif.c
+++ b/drivers/net/ethernet/stmicro/stmmac/hwif.c
@@ -6,6 +6,7 @@
 
 #include "common.h"
 #include "stmmac.h"
+#include "stmmac_pcs.h"
 #include "stmmac_ptp.h"
 #include "stmmac_est.h"
 
@@ -116,6 +117,7 @@ static const struct stmmac_hwif_entry {
 	const void *tc;
 	const void *mmc;
 	const void *est;
+	const void *pcs;
 	int (*setup)(struct stmmac_priv *priv);
 	int (*quirks)(struct stmmac_priv *priv);
 } stmmac_hw[] = {
@@ -144,12 +146,14 @@ static const struct stmmac_hwif_entry {
 		.xgmac = false,
 		.min_id = 0,
 		.regs = {
+			.pcs_off = PCS_GMAC3_X_OFFSET,
 			.ptp_off = PTP_GMAC3_X_OFFSET,
 			.mmc_off = MMC_GMAC3_X_OFFSET,
 		},
 		.desc = NULL,
 		.dma = &dwmac1000_dma_ops,
 		.mac = &dwmac1000_ops,
+		.pcs = &dwmac_pcs_ops,
 		.hwtimestamp = &stmmac_ptp,
 		.mode = NULL,
 		.tc = NULL,
@@ -162,6 +166,7 @@ static const struct stmmac_hwif_entry {
 		.xgmac = false,
 		.min_id = 0,
 		.regs = {
+			.pcs_off = PCS_GMAC4_OFFSET,
 			.ptp_off = PTP_GMAC4_OFFSET,
 			.mmc_off = MMC_GMAC4_OFFSET,
 			.est_off = EST_GMAC4_OFFSET,
@@ -169,6 +174,7 @@ static const struct stmmac_hwif_entry {
 		.desc = &dwmac4_desc_ops,
 		.dma = &dwmac4_dma_ops,
 		.mac = &dwmac4_ops,
+		.pcs = &dwmac_pcs_ops,
 		.hwtimestamp = &stmmac_ptp,
 		.mode = NULL,
 		.tc = &dwmac510_tc_ops,
@@ -182,6 +188,7 @@ static const struct stmmac_hwif_entry {
 		.xgmac = false,
 		.min_id = DWMAC_CORE_4_00,
 		.regs = {
+			.pcs_off = PCS_GMAC4_OFFSET,
 			.ptp_off = PTP_GMAC4_OFFSET,
 			.mmc_off = MMC_GMAC4_OFFSET,
 			.est_off = EST_GMAC4_OFFSET,
@@ -189,6 +196,7 @@ static const struct stmmac_hwif_entry {
 		.desc = &dwmac4_desc_ops,
 		.dma = &dwmac4_dma_ops,
 		.mac = &dwmac410_ops,
+		.pcs = &dwmac_pcs_ops,
 		.hwtimestamp = &stmmac_ptp,
 		.mode = &dwmac4_ring_mode_ops,
 		.tc = &dwmac510_tc_ops,
@@ -202,6 +210,7 @@ static const struct stmmac_hwif_entry {
 		.xgmac = false,
 		.min_id = DWMAC_CORE_4_10,
 		.regs = {
+			.pcs_off = PCS_GMAC4_OFFSET,
 			.ptp_off = PTP_GMAC4_OFFSET,
 			.mmc_off = MMC_GMAC4_OFFSET,
 			.est_off = EST_GMAC4_OFFSET,
@@ -209,6 +218,7 @@ static const struct stmmac_hwif_entry {
 		.desc = &dwmac4_desc_ops,
 		.dma = &dwmac410_dma_ops,
 		.mac = &dwmac410_ops,
+		.pcs = &dwmac_pcs_ops,
 		.hwtimestamp = &stmmac_ptp,
 		.mode = &dwmac4_ring_mode_ops,
 		.tc = &dwmac510_tc_ops,
@@ -222,6 +232,7 @@ static const struct stmmac_hwif_entry {
 		.xgmac = false,
 		.min_id = DWMAC_CORE_5_10,
 		.regs = {
+			.pcs_off = PCS_GMAC4_OFFSET,
 			.ptp_off = PTP_GMAC4_OFFSET,
 			.mmc_off = MMC_GMAC4_OFFSET,
 			.est_off = EST_GMAC4_OFFSET,
@@ -229,6 +240,7 @@ static const struct stmmac_hwif_entry {
 		.desc = &dwmac4_desc_ops,
 		.dma = &dwmac410_dma_ops,
 		.mac = &dwmac510_ops,
+		.pcs = &dwmac_pcs_ops,
 		.hwtimestamp = &stmmac_ptp,
 		.mode = &dwmac4_ring_mode_ops,
 		.tc = &dwmac510_tc_ops,
@@ -356,6 +368,8 @@ int stmmac_hwif_init(struct stmmac_priv *priv)
 		priv->hw = mac;
 		priv->ptpaddr = priv->ioaddr + entry->regs.ptp_off;
 		priv->mmcaddr = priv->ioaddr + entry->regs.mmc_off;
+		if (entry->pcs)
+			priv->pcsaddr = priv->ioaddr + entry->regs.pcs_off;
 		if (entry->est)
 			priv->estaddr = priv->ioaddr + entry->regs.est_off;
 
diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h
index 8a17e7d6e37d..ba930a87b71a 100644
--- a/drivers/net/ethernet/stmicro/stmmac/hwif.h
+++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h
@@ -376,7 +376,7 @@ struct stmmac_ops {
 		      struct stmmac_extra_stats *x, u32 rx_queues,
 		      u32 tx_queues);
 	/* PCS calls */
-	void (*pcs_ctrl_ane)(void __iomem *ioaddr, bool ane, bool srgmi_ral,
+	void (*pcs_ctrl_ane)(void __iomem *pcsaddr, bool ane, bool srgmi_ral,
 			     bool loopback);
 	/* Safety Features */
 	int (*safety_feat_config)(void __iomem *ioaddr, unsigned int asp,
@@ -670,6 +670,7 @@ struct stmmac_est_ops {
 	stmmac_do_void_callback(__priv, est, irq_status, __args)
 
 struct stmmac_regs_off {
+	u32 pcs_off;
 	u32 ptp_off;
 	u32 mmc_off;
 	u32 est_off;
@@ -692,6 +693,7 @@ extern const struct stmmac_desc_ops dwxgmac210_desc_ops;
 extern const struct stmmac_mmc_ops dwmac_mmc_ops;
 extern const struct stmmac_mmc_ops dwxgmac_mmc_ops;
 extern const struct stmmac_est_ops dwmac510_est_ops;
+extern const struct phylink_pcs_ops dwmac_pcs_ops;
 
 #define GMAC_VERSION		0x00000020	/* GMAC CORE Version */
 #define GMAC4_VERSION		0x00000110	/* GMAC4+ CORE Version */
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index b23b920eedb1..8091d162545a 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -312,6 +312,7 @@ struct stmmac_priv {
 	struct mutex aux_ts_lock;
 	wait_queue_head_t tstamp_busy_wait;
 
+	void __iomem *pcsaddr;
 	void __iomem *mmcaddr;
 	void __iomem *ptpaddr;
 	void __iomem *estaddr;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
index 849e6f121505..41b99f7e36e6 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
@@ -3,35 +3,35 @@
 
 int dwmac_pcs_config(struct mac_device_info *hw, unsigned int neg_mode,
 		     phy_interface_t interface,
-		     const unsigned long *advertising,
-		     unsigned int reg_base)
+		     const unsigned long *advertising)
 {
+	struct stmmac_priv *priv = hw->priv;
 	u32 val;
 
-	val = readl(hw->pcsr + GMAC_AN_CTRL(reg_base));
+	val = readl(priv->pcsaddr + PCS_AN_CTRL);
 
-	val |= GMAC_AN_CTRL_ANE | GMAC_AN_CTRL_RAN;
+	val |= PCS_AN_CTRL_ANE | PCS_AN_CTRL_RAN;
 
 	if (hw->ps)
-		val |= GMAC_AN_CTRL_SGMRAL;
+		val |= PCS_AN_CTRL_SGMRAL;
 
-	writel(val, hw->pcsr + GMAC_AN_CTRL(reg_base));
+	writel(val, priv->pcsaddr + PCS_AN_CTRL);
 
 	return 0;
 }
 
 void dwmac_pcs_get_state(struct mac_device_info *hw,
-			 struct phylink_link_state *state,
-			 unsigned int reg_base)
+			 struct phylink_link_state *state)
 {
+	struct stmmac_priv *priv = hw->priv;
 	u32 val;
 
-	val = readl(hw->pcsr + GMAC_ANE_LPA(reg_base));
+	val = readl(priv->pcsaddr + PCS_ANE_LPA);
 
 	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
 			 state->lp_advertising);
 
-	if (val & GMAC_ANE_FD) {
+	if (val & PCS_ANE_FD) {
 		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
 				 state->lp_advertising);
 		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT,
@@ -40,7 +40,7 @@ void dwmac_pcs_get_state(struct mac_device_info *hw,
 				 state->lp_advertising);
 	}
 
-	if (val & GMAC_ANE_HD) {
+	if (val & PCS_ANE_HD) {
 		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
 				 state->lp_advertising);
 		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT,
@@ -49,10 +49,14 @@ void dwmac_pcs_get_state(struct mac_device_info *hw,
 				 state->lp_advertising);
 	}
 
+	/* TODO Make sure that STMMAC_PCS_PAUSE STMMAC_PCS_ASYM_PAUSE usage is legitimate */
 	linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 			 state->lp_advertising,
-			 FIELD_GET(GMAC_ANE_PSE, val) & STMMAC_PCS_PAUSE);
+			 FIELD_GET(PCS_ANE_PSE, val) & STMMAC_PCS_PAUSE);
 	linkmode_mod_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 			 state->lp_advertising,
-			 FIELD_GET(GMAC_ANE_PSE, val) & STMMAC_PCS_ASYM_PAUSE);
+			 FIELD_GET(PCS_ANE_PSE, val) & STMMAC_PCS_ASYM_PAUSE);
 }
+
+const struct phylink_pcs_ops dwmac_pcs_ops = {
+};
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
index 27ea7f4d789d..62be3921ac91 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
@@ -13,61 +13,63 @@
 #include <linux/io.h>
 #include "common.h"
 
+#define PCS_GMAC4_OFFSET		0x000000e0
+#define PCS_GMAC3_X_OFFSET		0x000000c0
+
 /* PCS registers (AN/TBI/SGMII/RGMII) offsets */
-#define GMAC_AN_CTRL(x)		(x)		/* AN control */
-#define GMAC_AN_STATUS(x)	(x + 0x4)	/* AN status */
-#define GMAC_ANE_ADV(x)		(x + 0x8)	/* ANE Advertisement */
-#define GMAC_ANE_LPA(x)		(x + 0xc)	/* ANE link partener ability */
-#define GMAC_ANE_EXP(x)		(x + 0x10)	/* ANE expansion */
-#define GMAC_TBI(x)		(x + 0x14)	/* TBI extend status */
+#define PCS_AN_CTRL		0x00		/* AN control */
+#define PCS_AN_STATUS		0x04		/* AN status */
+#define PCS_ANE_ADV		0x08		/* ANE Advertisement */
+#define PCS_ANE_LPA		0x0c		/* ANE link partener ability */
+#define PCS_ANE_EXP		0x10		/* ANE expansion */
+#define PCS_TBI_EXT		0x14		/* TBI extended status */
 
 /* AN Configuration defines */
-#define GMAC_AN_CTRL_RAN	BIT(9)	/* Restart Auto-Negotiation */
-#define GMAC_AN_CTRL_ANE	BIT(12)	/* Auto-Negotiation Enable */
-#define GMAC_AN_CTRL_ELE	BIT(14)	/* External Loopback Enable */
-#define GMAC_AN_CTRL_ECD	BIT(16)	/* Enable Comma Detect */
-#define GMAC_AN_CTRL_LR		BIT(17)	/* Lock to Reference */
-#define GMAC_AN_CTRL_SGMRAL	BIT(18)	/* SGMII RAL Control */
+#define PCS_AN_CTRL_RAN		BIT(9)		/* Restart Auto-Negotiation */
+#define PCS_AN_CTRL_ANE		BIT(12)		/* Auto-Negotiation Enable */
+#define PCS_AN_CTRL_ELE		BIT(14)		/* External Loopback Enable */
+#define PCS_AN_CTRL_ECD		BIT(16)		/* Enable Comma Detect */
+#define PCS_AN_CTRL_LR		BIT(17)		/* Lock to Reference */
+#define PCS_AN_CTRL_SGMRAL	BIT(18)		/* SGMII RAL Control */
 
 /* AN Status defines */
-#define GMAC_AN_STATUS_LS	BIT(2)	/* Link Status 0:down 1:up */
-#define GMAC_AN_STATUS_ANA	BIT(3)	/* Auto-Negotiation Ability */
-#define GMAC_AN_STATUS_ANC	BIT(5)	/* Auto-Negotiation Complete */
-#define GMAC_AN_STATUS_ES	BIT(8)	/* Extended Status */
+#define PCS_AN_STATUS_LS	BIT(2)		/* Link Status 0:down 1:up */
+#define PCS_AN_STATUS_ANA	BIT(3)		/* Auto-Negotiation Ability */
+#define PCS_AN_STATUS_ANC	BIT(5)		/* Auto-Negotiation Complete */
+#define PCS_AN_STATUS_ES	BIT(8)		/* Extended Status Ability */
 
 /* ADV and LPA defines */
-#define GMAC_ANE_FD		BIT(5)
-#define GMAC_ANE_HD		BIT(6)
-#define GMAC_ANE_PSE		GENMASK(8, 7)
-#define GMAC_ANE_PSE_SHIFT	7
-#define GMAC_ANE_RFE		GENMASK(13, 12)
-#define GMAC_ANE_RFE_SHIFT	12
-#define GMAC_ANE_ACK		BIT(14)
+#define PCS_ANE_FD		BIT(5)		/* AN Full-duplex flag */
+#define PCS_ANE_HD		BIT(6)		/* AN Half-duplex flag */
+#define PCS_ANE_PSE		GENMASK(8, 7)	/* AN Pause Encoding */
+#define PCS_ANE_PSE_SHIFT	7
+#define PCS_ANE_RFE		GENMASK(13, 12)	/* AN Remote Fault Encoding */
+#define PCS_ANE_RFE_SHIFT	12
+#define PCS_ANE_ACK		BIT(14)		/* AN Base-page acknowledge */
 
 /**
  * dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR
  * @ioaddr: IO registers pointer
- * @reg: Base address of the AN Control Register.
  * @intr_status: GMAC core interrupt status
  * @x: pointer to log these events as stats
  * Description: it is the ISR for PCS events: Auto-Negotiation Completed and
  * Link status.
  */
-static inline void dwmac_pcs_isr(void __iomem *ioaddr, u32 reg,
+static inline void dwmac_pcs_isr(void __iomem *pcsaddr,
 				 unsigned int intr_status,
 				 struct stmmac_extra_stats *x)
 {
-	u32 val = readl(ioaddr + GMAC_AN_STATUS(reg));
+	u32 val = readl(pcsaddr + PCS_AN_STATUS);
 
 	if (intr_status & PCS_ANE_IRQ) {
 		x->irq_pcs_ane_n++;
-		if (val & GMAC_AN_STATUS_ANC)
+		if (val & PCS_AN_STATUS_ANC)
 			pr_info("stmmac_pcs: ANE process completed\n");
 	}
 
 	if (intr_status & PCS_LINK_IRQ) {
 		x->irq_pcs_link_n++;
-		if (val & GMAC_AN_STATUS_LS)
+		if (val & PCS_AN_STATUS_LS)
 			pr_info("stmmac_pcs: Link Up\n");
 		else
 			pr_info("stmmac_pcs: Link Down\n");
@@ -77,7 +79,6 @@ static inline void dwmac_pcs_isr(void __iomem *ioaddr, u32 reg,
 /**
  * dwmac_ctrl_ane - To program the AN Control Register.
  * @ioaddr: IO registers pointer
- * @reg: Base address of the AN Control Register.
  * @ane: to enable the auto-negotiation
  * @srgmi_ral: to manage MAC-2-MAC SGMII connections.
  * @loopback: to cause the PHY to loopback tx data into rx path.
@@ -85,36 +86,34 @@ static inline void dwmac_pcs_isr(void __iomem *ioaddr, u32 reg,
  * and init the ANE, select loopback (usually for debugging purpose) and
  * configure SGMII RAL.
  */
-static inline void dwmac_ctrl_ane(void __iomem *ioaddr, u32 reg, bool ane,
+static inline void dwmac_ctrl_ane(void __iomem *pcsaddr, bool ane,
 				  bool srgmi_ral, bool loopback)
 {
-	u32 value = readl(ioaddr + GMAC_AN_CTRL(reg));
+	u32 value = readl(pcsaddr + PCS_AN_CTRL);
 
 	/* Enable and restart the Auto-Negotiation */
 	if (ane)
-		value |= GMAC_AN_CTRL_ANE | GMAC_AN_CTRL_RAN;
+		value |= PCS_AN_CTRL_ANE | PCS_AN_CTRL_RAN;
 	else
-		value &= ~GMAC_AN_CTRL_ANE;
+		value &= ~PCS_AN_CTRL_ANE;
 
 	/* In case of MAC-2-MAC connection, block is configured to operate
 	 * according to MAC conf register.
 	 */
 	if (srgmi_ral)
-		value |= GMAC_AN_CTRL_SGMRAL;
+		value |= PCS_AN_CTRL_SGMRAL;
 
 	if (loopback)
-		value |= GMAC_AN_CTRL_ELE;
+		value |= PCS_AN_CTRL_ELE;
 
-	writel(value, ioaddr + GMAC_AN_CTRL(reg));
+	writel(value, pcsaddr + PCS_AN_CTRL);
 }
 
 int dwmac_pcs_config(struct mac_device_info *hw, unsigned int neg_mode,
 		     phy_interface_t interface,
-		     const unsigned long *advertising,
-		     unsigned int reg_base);
+		     const unsigned long *advertising);
 
 void dwmac_pcs_get_state(struct mac_device_info *hw,
-			 struct phylink_link_state *state,
-			 unsigned int reg_base);
+			 struct phylink_link_state *state);
 
 #endif /* __STMMAC_PCS_H__ */
-- 
2.43.0

[PATCH RFC net-next v2 11/17] net: stmmac: Introduce internal PCS config register getter

[Serge Semin]

The optional PCS module CSRs are mainly represented in the framework of
the address spaces [0x00c0:0x00db] on DW GMAC and [0x00e0:0x00f7] on DW
QoS Eth. The spaces mapping is identical in both IP-cores. But the link
state retrieved from the PHY or from another MAC (in MAC2MAC
setup) is mapped over the SGMII/RGMII/SMII Control and Status register in
a non-compatible way. In particular the DW GMAC register have the link
state mapped at the [15:0] field, and the DW QoS Eth register have it
mapped at the [31:16] field. Other than that the fields semantics is
identical - it's the TX_CONFIG_REG[15:0] register (see SGMII specification
for details) with a bit re-ordered fields and extended with some
SMII-specific flags:
tx_config_reg[0]:   LNKMOD
tx_config_reg[1:2]: LNKSPEED
tx_config_reg[3]:   LNKSTS
tx_config_reg[4]:   JABTO (Jabber Timeout, SMII-specific)
tx_config_reg[5]:   FALSCARDET (False Carrier Detected, SMII-specific)

In order to provide a fully generic internal STMMAC PCS module, let's
introduce the MAC-specific callback returning the link state detected by
the internal PCS.

Note the callback name has been chosen to be referring to the
TX_CONFIG_REG data described in the IP-core databooks and in the SGMII
specification.

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac1000.h     |  1 +
 .../net/ethernet/stmicro/stmmac/dwmac1000_core.c    | 11 +++++++++++
 drivers/net/ethernet/stmicro/stmmac/dwmac4.h        |  1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c   | 13 +++++++++++++
 drivers/net/ethernet/stmicro/stmmac/hwif.h          |  3 +++
 5 files changed, 29 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
index 4296ddda8aaa..f3a95d27298c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
@@ -86,6 +86,7 @@ enum power_event {
 #define GMAC_RGSMIIIS		0x000000d8	/* RGMII/SMII status */
 
 /* SGMII/RGMII status register */
+#define GMAC_RGSMIIIS_CONFIG_REG	GENMASK(15, 0)
 #define GMAC_RGSMIIIS_LNKMODE		BIT(0)
 #define GMAC_RGSMIIIS_SPEED		GENMASK(2, 1)
 #define GMAC_RGSMIIIS_SPEED_SHIFT	1
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index e525b92955b4..1e50cc573407 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -365,6 +365,16 @@ static void dwmac1000_set_eee_timer(struct mac_device_info *hw, int ls, int tw)
 	writel(value, ioaddr + LPI_TIMER_CTRL);
 }
 
+static u16 dwmac1000_pcs_get_config_reg(struct mac_device_info *hw)
+{
+	void __iomem *ioaddr = hw->pcsr;
+	u32 val;
+
+	val = readl(ioaddr + GMAC_RGSMIIIS);
+
+	return FIELD_GET(GMAC_RGSMIIIS_CONFIG_REG, val);
+}
+
 static void dwmac1000_ctrl_ane(void __iomem *pcsaddr, bool ane, bool srgmi_ral,
 			       bool loopback)
 {
@@ -568,6 +578,7 @@ const struct stmmac_ops dwmac1000_ops = {
 	.set_eee_timer = dwmac1000_set_eee_timer,
 	.set_eee_pls = dwmac1000_set_eee_pls,
 	.debug = dwmac1000_debug,
+	.pcs_get_config_reg = dwmac1000_pcs_get_config_reg,
 	.pcs_ctrl_ane = dwmac1000_ctrl_ane,
 	.set_mac_loopback = dwmac1000_set_mac_loopback,
 };
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
index d3c5306f1c41..bb2997191f08 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
@@ -567,6 +567,7 @@ static inline u32 mtl_low_credx_base_addr(const struct dwmac4_addrs *addrs,
 #define GMAC_PHYIF_CTRLSTATUS_TC		BIT(0)
 #define GMAC_PHYIF_CTRLSTATUS_LUD		BIT(1)
 #define GMAC_PHYIF_CTRLSTATUS_SMIDRXS		BIT(4)
+#define GMAC_PHYIF_CTRLSTATUS_CONFIG_REG	GENMASK(31, 16)
 #define GMAC_PHYIF_CTRLSTATUS_LNKMOD		BIT(16)
 #define GMAC_PHYIF_CTRLSTATUS_SPEED		GENMASK(18, 17)
 #define GMAC_PHYIF_CTRLSTATUS_SPEED_SHIFT	17
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index e51c95732bad..b7db076b4214 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -456,6 +456,16 @@ static void dwmac4_set_eee_timer(struct mac_device_info *hw, int ls, int tw)
 	writel(value, ioaddr + GMAC4_LPI_TIMER_CTRL);
 }
 
+static u16 dwmac4_pcs_get_config_reg(struct mac_device_info *hw)
+{
+	void __iomem *ioaddr = hw->pcsr;
+	u32 val;
+
+	val = readl(ioaddr + GMAC_PHYIF_CONTROL_STATUS);
+
+	return FIELD_GET(GMAC_PHYIF_CTRLSTATUS_CONFIG_REG, val);
+}
+
 static void dwmac4_write_single_vlan(struct net_device *dev, u16 vid)
 {
 	void __iomem *ioaddr = (void __iomem *)dev->base_addr;
@@ -1274,6 +1284,7 @@ const struct stmmac_ops dwmac4_ops = {
 	.set_eee_pls = dwmac4_set_eee_pls,
 	.pcs_ctrl_ane = dwmac4_ctrl_ane,
 	.debug = dwmac4_debug,
+	.pcs_get_config_reg = dwmac4_pcs_get_config_reg,
 	.set_filter = dwmac4_set_filter,
 	.set_mac_loopback = dwmac4_set_mac_loopback,
 	.update_vlan_hash = dwmac4_update_vlan_hash,
@@ -1318,6 +1329,7 @@ const struct stmmac_ops dwmac410_ops = {
 	.set_eee_pls = dwmac4_set_eee_pls,
 	.pcs_ctrl_ane = dwmac4_ctrl_ane,
 	.debug = dwmac4_debug,
+	.pcs_get_config_reg = dwmac4_pcs_get_config_reg,
 	.set_filter = dwmac4_set_filter,
 	.flex_pps_config = dwmac5_flex_pps_config,
 	.set_mac_loopback = dwmac4_set_mac_loopback,
@@ -1366,6 +1378,7 @@ const struct stmmac_ops dwmac510_ops = {
 	.set_eee_pls = dwmac4_set_eee_pls,
 	.pcs_ctrl_ane = dwmac4_ctrl_ane,
 	.debug = dwmac4_debug,
+	.pcs_get_config_reg = dwmac4_pcs_get_config_reg,
 	.set_filter = dwmac4_set_filter,
 	.safety_feat_config = dwmac5_safety_feat_config,
 	.safety_feat_irq_status = dwmac5_safety_feat_irq_status,
diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h
index ba930a87b71a..00995a0c9813 100644
--- a/drivers/net/ethernet/stmicro/stmmac/hwif.h
+++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h
@@ -376,6 +376,7 @@ struct stmmac_ops {
 		      struct stmmac_extra_stats *x, u32 rx_queues,
 		      u32 tx_queues);
 	/* PCS calls */
+	u16 (*pcs_get_config_reg)(struct mac_device_info *hw);
 	void (*pcs_ctrl_ane)(void __iomem *pcsaddr, bool ane, bool srgmi_ral,
 			     bool loopback);
 	/* Safety Features */
@@ -492,6 +493,8 @@ struct stmmac_ops {
 	stmmac_do_void_callback(__priv, mac, set_eee_pls, __args)
 #define stmmac_mac_debug(__priv, __args...) \
 	stmmac_do_void_callback(__priv, mac, debug, __priv, __args)
+#define stmmac_pcs_get_config_reg(__priv, __args...) \
+	stmmac_do_callback(__priv, mac, pcs_get_config_reg, __args)
 #define stmmac_pcs_ctrl_ane(__priv, __args...) \
 	stmmac_do_void_callback(__priv, mac, pcs_ctrl_ane, __args)
 #define stmmac_safety_feat_config(__priv, __args...) \
-- 
2.43.0

[PATCH RFC net-next v2 12/17] net: stmmac: Introduce internal PCS IRQ enable/disable methods

[Serge Semin]

The PCS IRQ enable/disable procedures have been utilized in the framework
of the PHYLINK PCS enable/disable callbacks. Since a generic STMMAC
PHYLINK PCS implementation is about to be introduced let's move the
procedures into the dedicated DW GMAC and DW QoS Eth HW-abstraction
methods. These methods will be called from the PCS enable/disable
functions defined in the stmmac_pcs.c in the DW MAC-independent manner.

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
---
 .../ethernet/stmicro/stmmac/dwmac1000_core.c  | 34 ++++++++++++-----
 .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 38 ++++++++++++++-----
 drivers/net/ethernet/stmicro/stmmac/hwif.h    |  6 +++
 3 files changed, 58 insertions(+), 20 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index 1e50cc573407..99f0bbb318ec 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -365,6 +365,26 @@ static void dwmac1000_set_eee_timer(struct mac_device_info *hw, int ls, int tw)
 	writel(value, ioaddr + LPI_TIMER_CTRL);
 }
 
+static void dwmac1000_pcs_enable_irq(struct mac_device_info *hw)
+{
+	void __iomem *ioaddr = hw->pcsr;
+	u32 intr_mask;
+
+	intr_mask = readl(ioaddr + GMAC_INT_MASK);
+	intr_mask &= ~GMAC_INT_DISABLE_PCS;
+	writel(intr_mask, ioaddr + GMAC_INT_MASK);
+}
+
+static void dwmac1000_pcs_disable_irq(struct mac_device_info *hw)
+{
+	void __iomem *ioaddr = hw->pcsr;
+	u32 intr_mask;
+
+	intr_mask = readl(ioaddr + GMAC_INT_MASK);
+	intr_mask |= GMAC_INT_DISABLE_PCS;
+	writel(intr_mask, ioaddr + GMAC_INT_MASK);
+}
+
 static u16 dwmac1000_pcs_get_config_reg(struct mac_device_info *hw)
 {
 	void __iomem *ioaddr = hw->pcsr;
@@ -395,12 +415,8 @@ static int dwmac1000_mii_pcs_validate(struct phylink_pcs *pcs,
 static int dwmac1000_mii_pcs_enable(struct phylink_pcs *pcs)
 {
 	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
-	void __iomem *ioaddr = hw->pcsr;
-	u32 intr_mask;
 
-	intr_mask = readl(ioaddr + GMAC_INT_MASK);
-	intr_mask &= ~GMAC_INT_DISABLE_PCS;
-	writel(intr_mask, ioaddr + GMAC_INT_MASK);
+	dwmac1000_pcs_enable_irq(hw);
 
 	return 0;
 }
@@ -408,12 +424,8 @@ static int dwmac1000_mii_pcs_enable(struct phylink_pcs *pcs)
 static void dwmac1000_mii_pcs_disable(struct phylink_pcs *pcs)
 {
 	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
-	void __iomem *ioaddr = hw->pcsr;
-	u32 intr_mask;
 
-	intr_mask = readl(ioaddr + GMAC_INT_MASK);
-	intr_mask |= GMAC_INT_DISABLE_PCS;
-	writel(intr_mask, ioaddr + GMAC_INT_MASK);
+	dwmac1000_pcs_disable_irq(hw);
 }
 
 static int dwmac1000_mii_pcs_config(struct phylink_pcs *pcs,
@@ -578,6 +590,8 @@ const struct stmmac_ops dwmac1000_ops = {
 	.set_eee_timer = dwmac1000_set_eee_timer,
 	.set_eee_pls = dwmac1000_set_eee_pls,
 	.debug = dwmac1000_debug,
+	.pcs_enable_irq = dwmac1000_pcs_enable_irq,
+	.pcs_disable_irq = dwmac1000_pcs_disable_irq,
 	.pcs_get_config_reg = dwmac1000_pcs_get_config_reg,
 	.pcs_ctrl_ane = dwmac1000_ctrl_ane,
 	.set_mac_loopback = dwmac1000_set_mac_loopback,
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index b7db076b4214..5dc8d59d3a8f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -456,6 +456,26 @@ static void dwmac4_set_eee_timer(struct mac_device_info *hw, int ls, int tw)
 	writel(value, ioaddr + GMAC4_LPI_TIMER_CTRL);
 }
 
+static void dwmac4_pcs_enable_irq(struct mac_device_info *hw)
+{
+	void __iomem *ioaddr = hw->pcsr;
+	u32 intr_enable;
+
+	intr_enable = readl(ioaddr + GMAC_INT_EN);
+	intr_enable |= GMAC_PCS_IRQ_DEFAULT;
+	writel(intr_enable, ioaddr + GMAC_INT_EN);
+}
+
+static void dwmac4_pcs_disable_irq(struct mac_device_info *hw)
+{
+	void __iomem *ioaddr = hw->pcsr;
+	u32 intr_enable;
+
+	intr_enable = readl(ioaddr + GMAC_INT_EN);
+	intr_enable &= ~GMAC_PCS_IRQ_DEFAULT;
+	writel(intr_enable, ioaddr + GMAC_INT_EN);
+}
+
 static u16 dwmac4_pcs_get_config_reg(struct mac_device_info *hw)
 {
 	void __iomem *ioaddr = hw->pcsr;
@@ -780,12 +800,8 @@ static int dwmac4_mii_pcs_validate(struct phylink_pcs *pcs,
 static int dwmac4_mii_pcs_enable(struct phylink_pcs *pcs)
 {
 	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
-	void __iomem *ioaddr = hw->pcsr;
-	u32 intr_enable;
 
-	intr_enable = readl(ioaddr + GMAC_INT_EN);
-	intr_enable |= GMAC_PCS_IRQ_DEFAULT;
-	writel(intr_enable, ioaddr + GMAC_INT_EN);
+	dwmac4_pcs_enable_irq(hw);
 
 	return 0;
 }
@@ -793,12 +809,8 @@ static int dwmac4_mii_pcs_enable(struct phylink_pcs *pcs)
 static void dwmac4_mii_pcs_disable(struct phylink_pcs *pcs)
 {
 	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
-	void __iomem *ioaddr = hw->pcsr;
-	u32 intr_enable;
 
-	intr_enable = readl(ioaddr + GMAC_INT_EN);
-	intr_enable &= ~GMAC_PCS_IRQ_DEFAULT;
-	writel(intr_enable, ioaddr + GMAC_INT_EN);
+	dwmac4_pcs_disable_irq(hw);
 }
 
 static int dwmac4_mii_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
@@ -1284,6 +1296,8 @@ const struct stmmac_ops dwmac4_ops = {
 	.set_eee_pls = dwmac4_set_eee_pls,
 	.pcs_ctrl_ane = dwmac4_ctrl_ane,
 	.debug = dwmac4_debug,
+	.pcs_enable_irq = dwmac4_pcs_enable_irq,
+	.pcs_disable_irq = dwmac4_pcs_disable_irq,
 	.pcs_get_config_reg = dwmac4_pcs_get_config_reg,
 	.set_filter = dwmac4_set_filter,
 	.set_mac_loopback = dwmac4_set_mac_loopback,
@@ -1329,6 +1343,8 @@ const struct stmmac_ops dwmac410_ops = {
 	.set_eee_pls = dwmac4_set_eee_pls,
 	.pcs_ctrl_ane = dwmac4_ctrl_ane,
 	.debug = dwmac4_debug,
+	.pcs_enable_irq = dwmac4_pcs_enable_irq,
+	.pcs_disable_irq = dwmac4_pcs_disable_irq,
 	.pcs_get_config_reg = dwmac4_pcs_get_config_reg,
 	.set_filter = dwmac4_set_filter,
 	.flex_pps_config = dwmac5_flex_pps_config,
@@ -1378,6 +1394,8 @@ const struct stmmac_ops dwmac510_ops = {
 	.set_eee_pls = dwmac4_set_eee_pls,
 	.pcs_ctrl_ane = dwmac4_ctrl_ane,
 	.debug = dwmac4_debug,
+	.pcs_enable_irq = dwmac4_pcs_enable_irq,
+	.pcs_disable_irq = dwmac4_pcs_disable_irq,
 	.pcs_get_config_reg = dwmac4_pcs_get_config_reg,
 	.set_filter = dwmac4_set_filter,
 	.safety_feat_config = dwmac5_safety_feat_config,
diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h
index 00995a0c9813..2caa946a92f9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/hwif.h
+++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h
@@ -376,6 +376,8 @@ struct stmmac_ops {
 		      struct stmmac_extra_stats *x, u32 rx_queues,
 		      u32 tx_queues);
 	/* PCS calls */
+	void (*pcs_enable_irq)(struct mac_device_info *hw);
+	void (*pcs_disable_irq)(struct mac_device_info *hw);
 	u16 (*pcs_get_config_reg)(struct mac_device_info *hw);
 	void (*pcs_ctrl_ane)(void __iomem *pcsaddr, bool ane, bool srgmi_ral,
 			     bool loopback);
@@ -493,6 +495,10 @@ struct stmmac_ops {
 	stmmac_do_void_callback(__priv, mac, set_eee_pls, __args)
 #define stmmac_mac_debug(__priv, __args...) \
 	stmmac_do_void_callback(__priv, mac, debug, __priv, __args)
+#define stmmac_pcs_enable_irq(__priv, __args...) \
+	stmmac_do_void_callback(__priv, mac, pcs_enable_irq, __args)
+#define stmmac_pcs_disable_irq(__priv, __args...) \
+	stmmac_do_void_callback(__priv, mac, pcs_disable_irq, __args)
 #define stmmac_pcs_get_config_reg(__priv, __args...) \
 	stmmac_do_callback(__priv, mac, pcs_get_config_reg, __args)
 #define stmmac_pcs_ctrl_ane(__priv, __args...) \
-- 
2.43.0

[PATCH RFC net-next v2 13/17] net: stmmac: Move internal PCS ANE-control method to dwmac-qcom-ethqos.c

[Serge Semin]

The dwmac_ctrl_ane() method is not going to be utilized in the internal
PCS implementation. Simplify the DW *MAC HW-abstraction interface by
moving the method definition to the only user of it - dwmac-qcom-ethqos.c.

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
---
 .../stmicro/stmmac/dwmac-qcom-ethqos.c        | 31 ++++++++++++++---
 .../ethernet/stmicro/stmmac/dwmac1000_core.c  |  7 ----
 .../net/ethernet/stmicro/stmmac/dwmac4_core.c |  9 -----
 drivers/net/ethernet/stmicro/stmmac/hwif.h    |  4 ---
 .../net/ethernet/stmicro/stmmac/stmmac_pcs.h  | 33 -------------------
 5 files changed, 27 insertions(+), 57 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
index d0bcebe87ee8..fcd13a9afd59 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
@@ -615,6 +615,29 @@ static void ethqos_set_serdes_speed(struct qcom_ethqos *ethqos, int speed)
 	}
 }
 
+static inline void ethqos_ctrl_ane(void __iomem *pcsaddr, bool ane,
+				   bool srgmi_ral, bool loopback)
+{
+	u32 value = readl(pcsaddr + PCS_AN_CTRL);
+
+	/* Enable and restart the Auto-Negotiation */
+	if (ane)
+		value |= PCS_AN_CTRL_ANE | PCS_AN_CTRL_RAN;
+	else
+		value &= ~PCS_AN_CTRL_ANE;
+
+	/* In case of MAC-2-MAC connection, block is configured to operate
+	 * according to MAC conf register.
+	 */
+	if (srgmi_ral)
+		value |= PCS_AN_CTRL_SGMRAL;
+
+	if (loopback)
+		value |= PCS_AN_CTRL_ELE;
+
+	writel(value, pcsaddr + PCS_AN_CTRL);
+}
+
 /* On interface toggle MAC registers gets reset.
  * Configure MAC block for SGMII on ethernet phy link up
  */
@@ -633,7 +656,7 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
 			      RGMII_CONFIG2_RGMII_CLK_SEL_CFG,
 			      RGMII_IO_MACRO_CONFIG2);
 		ethqos_set_serdes_speed(ethqos, SPEED_2500);
-		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 0, 0, 0);
+		ethqos_ctrl_ane(priv->pcsaddr, 0, 0, 0);
 		break;
 	case SPEED_1000:
 		val &= ~ETHQOS_MAC_CTRL_PORT_SEL;
@@ -641,12 +664,12 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
 			      RGMII_CONFIG2_RGMII_CLK_SEL_CFG,
 			      RGMII_IO_MACRO_CONFIG2);
 		ethqos_set_serdes_speed(ethqos, SPEED_1000);
-		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 1, 0, 0);
+		ethqos_ctrl_ane(priv->pcsaddr, 1, 0, 0);
 		break;
 	case SPEED_100:
 		val |= ETHQOS_MAC_CTRL_PORT_SEL | ETHQOS_MAC_CTRL_SPEED_MODE;
 		ethqos_set_serdes_speed(ethqos, SPEED_1000);
-		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 1, 0, 0);
+		ethqos_ctrl_ane(priv->pcsaddr, 1, 0, 0);
 		break;
 	case SPEED_10:
 		val |= ETHQOS_MAC_CTRL_PORT_SEL;
@@ -656,7 +679,7 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
 					 SGMII_10M_RX_CLK_DVDR),
 			      RGMII_IO_MACRO_CONFIG);
 		ethqos_set_serdes_speed(ethqos, SPEED_1000);
-		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 1, 0, 0);
+		ethqos_ctrl_ane(priv->pcsaddr, 1, 0, 0);
 		break;
 	}
 
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index 99f0bbb318ec..9511ea753da7 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -395,12 +395,6 @@ static u16 dwmac1000_pcs_get_config_reg(struct mac_device_info *hw)
 	return FIELD_GET(GMAC_RGSMIIIS_CONFIG_REG, val);
 }
 
-static void dwmac1000_ctrl_ane(void __iomem *pcsaddr, bool ane, bool srgmi_ral,
-			       bool loopback)
-{
-	dwmac_ctrl_ane(pcsaddr, ane, srgmi_ral, loopback);
-}
-
 static int dwmac1000_mii_pcs_validate(struct phylink_pcs *pcs,
 				      unsigned long *supported,
 				      const struct phylink_link_state *state)
@@ -593,7 +587,6 @@ const struct stmmac_ops dwmac1000_ops = {
 	.pcs_enable_irq = dwmac1000_pcs_enable_irq,
 	.pcs_disable_irq = dwmac1000_pcs_disable_irq,
 	.pcs_get_config_reg = dwmac1000_pcs_get_config_reg,
-	.pcs_ctrl_ane = dwmac1000_ctrl_ane,
 	.set_mac_loopback = dwmac1000_set_mac_loopback,
 };
 
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 5dc8d59d3a8f..1e73c14f36ce 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -780,12 +780,6 @@ static void dwmac4_flow_ctrl(struct mac_device_info *hw, unsigned int duplex,
 	}
 }
 
-static void dwmac4_ctrl_ane(void __iomem *pcsaddr, bool ane, bool srgmi_ral,
-			    bool loopback)
-{
-	dwmac_ctrl_ane(pcsaddr, ane, srgmi_ral, loopback);
-}
-
 static int dwmac4_mii_pcs_validate(struct phylink_pcs *pcs,
 				   unsigned long *supported,
 				   const struct phylink_link_state *state)
@@ -1294,7 +1288,6 @@ const struct stmmac_ops dwmac4_ops = {
 	.set_eee_lpi_entry_timer = dwmac4_set_eee_lpi_entry_timer,
 	.set_eee_timer = dwmac4_set_eee_timer,
 	.set_eee_pls = dwmac4_set_eee_pls,
-	.pcs_ctrl_ane = dwmac4_ctrl_ane,
 	.debug = dwmac4_debug,
 	.pcs_enable_irq = dwmac4_pcs_enable_irq,
 	.pcs_disable_irq = dwmac4_pcs_disable_irq,
@@ -1341,7 +1334,6 @@ const struct stmmac_ops dwmac410_ops = {
 	.set_eee_lpi_entry_timer = dwmac4_set_eee_lpi_entry_timer,
 	.set_eee_timer = dwmac4_set_eee_timer,
 	.set_eee_pls = dwmac4_set_eee_pls,
-	.pcs_ctrl_ane = dwmac4_ctrl_ane,
 	.debug = dwmac4_debug,
 	.pcs_enable_irq = dwmac4_pcs_enable_irq,
 	.pcs_disable_irq = dwmac4_pcs_disable_irq,
@@ -1392,7 +1384,6 @@ const struct stmmac_ops dwmac510_ops = {
 	.set_eee_lpi_entry_timer = dwmac4_set_eee_lpi_entry_timer,
 	.set_eee_timer = dwmac4_set_eee_timer,
 	.set_eee_pls = dwmac4_set_eee_pls,
-	.pcs_ctrl_ane = dwmac4_ctrl_ane,
 	.debug = dwmac4_debug,
 	.pcs_enable_irq = dwmac4_pcs_enable_irq,
 	.pcs_disable_irq = dwmac4_pcs_disable_irq,
diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h
index 2caa946a92f9..3d39417e906d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/hwif.h
+++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h
@@ -379,8 +379,6 @@ struct stmmac_ops {
 	void (*pcs_enable_irq)(struct mac_device_info *hw);
 	void (*pcs_disable_irq)(struct mac_device_info *hw);
 	u16 (*pcs_get_config_reg)(struct mac_device_info *hw);
-	void (*pcs_ctrl_ane)(void __iomem *pcsaddr, bool ane, bool srgmi_ral,
-			     bool loopback);
 	/* Safety Features */
 	int (*safety_feat_config)(void __iomem *ioaddr, unsigned int asp,
 				  struct stmmac_safety_feature_cfg *safety_cfg);
@@ -501,8 +499,6 @@ struct stmmac_ops {
 	stmmac_do_void_callback(__priv, mac, pcs_disable_irq, __args)
 #define stmmac_pcs_get_config_reg(__priv, __args...) \
 	stmmac_do_callback(__priv, mac, pcs_get_config_reg, __args)
-#define stmmac_pcs_ctrl_ane(__priv, __args...) \
-	stmmac_do_void_callback(__priv, mac, pcs_ctrl_ane, __args)
 #define stmmac_safety_feat_config(__priv, __args...) \
 	stmmac_do_callback(__priv, mac, safety_feat_config, __args)
 #define stmmac_safety_feat_irq_status(__priv, __args...) \
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
index 62be3921ac91..76badfd208b6 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
@@ -76,39 +76,6 @@ static inline void dwmac_pcs_isr(void __iomem *pcsaddr,
 	}
 }
 
-/**
- * dwmac_ctrl_ane - To program the AN Control Register.
- * @ioaddr: IO registers pointer
- * @ane: to enable the auto-negotiation
- * @srgmi_ral: to manage MAC-2-MAC SGMII connections.
- * @loopback: to cause the PHY to loopback tx data into rx path.
- * Description: this is the main function to configure the AN control register
- * and init the ANE, select loopback (usually for debugging purpose) and
- * configure SGMII RAL.
- */
-static inline void dwmac_ctrl_ane(void __iomem *pcsaddr, bool ane,
-				  bool srgmi_ral, bool loopback)
-{
-	u32 value = readl(pcsaddr + PCS_AN_CTRL);
-
-	/* Enable and restart the Auto-Negotiation */
-	if (ane)
-		value |= PCS_AN_CTRL_ANE | PCS_AN_CTRL_RAN;
-	else
-		value &= ~PCS_AN_CTRL_ANE;
-
-	/* In case of MAC-2-MAC connection, block is configured to operate
-	 * according to MAC conf register.
-	 */
-	if (srgmi_ral)
-		value |= PCS_AN_CTRL_SGMRAL;
-
-	if (loopback)
-		value |= PCS_AN_CTRL_ELE;
-
-	writel(value, pcsaddr + PCS_AN_CTRL);
-}
-
 int dwmac_pcs_config(struct mac_device_info *hw, unsigned int neg_mode,
 		     phy_interface_t interface,
 		     const unsigned long *advertising);
-- 
2.43.0

[PATCH RFC net-next v2 14/17] net: stmmac: Move internal PCS PHYLINK ops to stmmac_pcs.c

[Serge Semin]

The PCS-related code is now ready to be consolidated in the PCS-specific
module. Let's move the PHYLINK PCS operations implementation to the
stmmac_pcs.c file. No semantics has changed. The same functionality has
been re-implemented in stammac_pcs.c by using the generic link status
register macros and the phylink_pcs_ops instance has been populated with
the new callbacks.

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>

---

Note the code has been equipped with some TODO-notes to think about on the
RFC review stage.
---
 .../net/ethernet/stmicro/stmmac/dwmac1000.h   | 12 ---
 .../ethernet/stmicro/stmmac/dwmac1000_core.c  | 74 ----------------
 drivers/net/ethernet/stmicro/stmmac/dwmac4.h  | 12 ---
 .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 80 -----------------
 drivers/net/ethernet/stmicro/stmmac/hwif.c    |  1 +
 .../net/ethernet/stmicro/stmmac/stmmac_pcs.c  | 86 +++++++++++++++++--
 .../net/ethernet/stmicro/stmmac/stmmac_pcs.h  | 17 ++--
 7 files changed, 91 insertions(+), 191 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
index f3a95d27298c..94be66e794be 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
@@ -87,19 +87,7 @@ enum power_event {
 
 /* SGMII/RGMII status register */
 #define GMAC_RGSMIIIS_CONFIG_REG	GENMASK(15, 0)
-#define GMAC_RGSMIIIS_LNKMODE		BIT(0)
-#define GMAC_RGSMIIIS_SPEED		GENMASK(2, 1)
-#define GMAC_RGSMIIIS_SPEED_SHIFT	1
-#define GMAC_RGSMIIIS_LNKSTS		BIT(3)
-#define GMAC_RGSMIIIS_JABTO		BIT(4)
-#define GMAC_RGSMIIIS_FALSECARDET	BIT(5)
 #define GMAC_RGSMIIIS_SMIDRXS		BIT(16)
-/* LNKMOD */
-#define GMAC_RGSMIIIS_LNKMOD_MASK	0x1
-/* LNKSPEED */
-#define GMAC_RGSMIIIS_SPEED_125		0x2
-#define GMAC_RGSMIIIS_SPEED_25		0x1
-#define GMAC_RGSMIIIS_SPEED_2_5		0x0
 
 /* GMAC Configuration defines */
 #define GMAC_CONTROL_2K 0x08000000	/* IEEE 802.3as 2K packets */
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index 9511ea753da7..332018ecd624 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -395,79 +395,6 @@ static u16 dwmac1000_pcs_get_config_reg(struct mac_device_info *hw)
 	return FIELD_GET(GMAC_RGSMIIIS_CONFIG_REG, val);
 }
 
-static int dwmac1000_mii_pcs_validate(struct phylink_pcs *pcs,
-				      unsigned long *supported,
-				      const struct phylink_link_state *state)
-{
-	/* Only support in-band */
-	if (!test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, state->advertising))
-		return -EINVAL;
-
-	return 0;
-}
-
-static int dwmac1000_mii_pcs_enable(struct phylink_pcs *pcs)
-{
-	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
-
-	dwmac1000_pcs_enable_irq(hw);
-
-	return 0;
-}
-
-static void dwmac1000_mii_pcs_disable(struct phylink_pcs *pcs)
-{
-	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
-
-	dwmac1000_pcs_disable_irq(hw);
-}
-
-static int dwmac1000_mii_pcs_config(struct phylink_pcs *pcs,
-				    unsigned int neg_mode,
-				    phy_interface_t interface,
-				    const unsigned long *advertising,
-				    bool permit_pause_to_mac)
-{
-	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
-
-	return dwmac_pcs_config(hw, neg_mode, advertising, advertising);
-}
-
-static void dwmac1000_mii_pcs_get_state(struct phylink_pcs *pcs,
-					struct phylink_link_state *state)
-{
-	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
-	unsigned int spd_clk;
-	u32 status;
-
-	status = readl(hw->pcsr + GMAC_RGSMIIIS);
-
-	state->link = status & GMAC_RGSMIIIS_LNKSTS;
-	if (!state->link)
-		return;
-
-	spd_clk = FIELD_GET(GMAC_RGSMIIIS_SPEED, status);
-	if (spd_clk == GMAC_RGSMIIIS_SPEED_125)
-		state->speed = SPEED_1000;
-	else if (spd_clk == GMAC_RGSMIIIS_SPEED_25)
-		state->speed = SPEED_100;
-	else if (spd_clk == GMAC_RGSMIIIS_SPEED_2_5)
-		state->speed = SPEED_10;
-
-	state->duplex = status & GMAC_RGSMIIIS_LNKMOD_MASK ?
-			DUPLEX_FULL : DUPLEX_HALF;
-
-	dwmac_pcs_get_state(hw, state);
-}
-
-static const struct phylink_pcs_ops dwmac1000_mii_pcs_ops = {
-	.pcs_validate = dwmac1000_mii_pcs_validate,
-	.pcs_enable = dwmac1000_mii_pcs_enable,
-	.pcs_disable = dwmac1000_mii_pcs_disable,
-	.pcs_config = dwmac1000_mii_pcs_config,
-	.pcs_get_state = dwmac1000_mii_pcs_get_state,
-};
-
 static struct phylink_pcs *
 dwmac1000_phylink_select_pcs(struct stmmac_priv *priv,
 			     phy_interface_t interface)
@@ -621,7 +548,6 @@ int dwmac1000_setup(struct stmmac_priv *priv)
 	mac->mii.clk_csr_shift = 2;
 	mac->mii.clk_csr_mask = GENMASK(5, 2);
 
-	mac->mac_pcs.ops = &dwmac1000_mii_pcs_ops;
 	mac->mac_pcs.neg_mode = true;
 
 	return 0;
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
index bb2997191f08..5c765e16bc13 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
@@ -568,18 +568,6 @@ static inline u32 mtl_low_credx_base_addr(const struct dwmac4_addrs *addrs,
 #define GMAC_PHYIF_CTRLSTATUS_LUD		BIT(1)
 #define GMAC_PHYIF_CTRLSTATUS_SMIDRXS		BIT(4)
 #define GMAC_PHYIF_CTRLSTATUS_CONFIG_REG	GENMASK(31, 16)
-#define GMAC_PHYIF_CTRLSTATUS_LNKMOD		BIT(16)
-#define GMAC_PHYIF_CTRLSTATUS_SPEED		GENMASK(18, 17)
-#define GMAC_PHYIF_CTRLSTATUS_SPEED_SHIFT	17
-#define GMAC_PHYIF_CTRLSTATUS_LNKSTS		BIT(19)
-#define GMAC_PHYIF_CTRLSTATUS_JABTO		BIT(20)
-#define GMAC_PHYIF_CTRLSTATUS_FALSECARDET	BIT(21)
-/* LNKMOD */
-#define GMAC_PHYIF_CTRLSTATUS_LNKMOD_MASK	0x1
-/* LNKSPEED */
-#define GMAC_PHYIF_CTRLSTATUS_SPEED_125		0x2
-#define GMAC_PHYIF_CTRLSTATUS_SPEED_25		0x1
-#define GMAC_PHYIF_CTRLSTATUS_SPEED_2_5		0x0
 
 extern const struct stmmac_dma_ops dwmac4_dma_ops;
 extern const struct stmmac_dma_ops dwmac410_dma_ops;
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 1e73c14f36ce..1487f5cc5249 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -780,85 +780,6 @@ static void dwmac4_flow_ctrl(struct mac_device_info *hw, unsigned int duplex,
 	}
 }
 
-static int dwmac4_mii_pcs_validate(struct phylink_pcs *pcs,
-				   unsigned long *supported,
-				   const struct phylink_link_state *state)
-{
-	/* Only support in-band */
-	if (!test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, state->advertising))
-		return -EINVAL;
-
-	return 0;
-}
-
-static int dwmac4_mii_pcs_enable(struct phylink_pcs *pcs)
-{
-	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
-
-	dwmac4_pcs_enable_irq(hw);
-
-	return 0;
-}
-
-static void dwmac4_mii_pcs_disable(struct phylink_pcs *pcs)
-{
-	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
-
-	dwmac4_pcs_disable_irq(hw);
-}
-
-static int dwmac4_mii_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
-				 phy_interface_t interface,
-				 const unsigned long *advertising,
-				 bool permit_pause_to_mac)
-{
-	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
-
-	return dwmac_pcs_config(hw, advertising, interface, advertising);
-}
-
-static void dwmac4_mii_pcs_get_state(struct phylink_pcs *pcs,
-				     struct phylink_link_state *state)
-{
-	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
-	unsigned int clk_spd;
-	u32 status;
-
-	status = readl(hw->pcsr + GMAC_PHYIF_CONTROL_STATUS);
-
-	state->link = !!(status & GMAC_PHYIF_CTRLSTATUS_LNKSTS);
-	if (!state->link)
-		return;
-
-	clk_spd = FIELD_GET(GMAC_PHYIF_CTRLSTATUS_SPEED, status);
-	if (clk_spd == GMAC_PHYIF_CTRLSTATUS_SPEED_125)
-		state->speed = SPEED_1000;
-	else if (clk_spd == GMAC_PHYIF_CTRLSTATUS_SPEED_25)
-		state->speed = SPEED_100;
-	else if (clk_spd == GMAC_PHYIF_CTRLSTATUS_SPEED_2_5)
-		state->speed = SPEED_10;
-
-	/* FIXME: Is this even correct?
-	 * GMAC_PHYIF_CTRLSTATUS_TC = BIT(0)
-	 * GMAC_PHYIF_CTRLSTATUS_LNKMOD = BIT(16)
-	 * GMAC_PHYIF_CTRLSTATUS_LNKMOD_MASK = 1
-	 *
-	 * The result is, we test bit 0 for the duplex setting.
-	 */
-	state->duplex = status & GMAC_PHYIF_CTRLSTATUS_LNKMOD_MASK ?
-			DUPLEX_FULL : DUPLEX_HALF;
-
-	dwmac_pcs_get_state(hw, state);
-}
-
-static const struct phylink_pcs_ops dwmac4_mii_pcs_ops = {
-	.pcs_validate = dwmac4_mii_pcs_validate,
-	.pcs_enable = dwmac4_mii_pcs_enable,
-	.pcs_disable = dwmac4_mii_pcs_disable,
-	.pcs_config = dwmac4_mii_pcs_config,
-	.pcs_get_state = dwmac4_mii_pcs_get_state,
-};
-
 static struct phylink_pcs *
 dwmac4_phylink_select_pcs(struct stmmac_priv *priv, phy_interface_t interface)
 {
@@ -1475,7 +1396,6 @@ int dwmac4_setup(struct stmmac_priv *priv)
 	mac->mii.clk_csr_mask = GENMASK(11, 8);
 	mac->num_vlan = dwmac4_get_num_vlan(priv->ioaddr);
 
-	mac->mac_pcs.ops = &dwmac4_mii_pcs_ops;
 	mac->mac_pcs.neg_mode = true;
 
 	return 0;
diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.c b/drivers/net/ethernet/stmicro/stmmac/hwif.c
index 3666893acb69..c42fb2437948 100644
--- a/drivers/net/ethernet/stmicro/stmmac/hwif.c
+++ b/drivers/net/ethernet/stmicro/stmmac/hwif.c
@@ -363,6 +363,7 @@ int stmmac_hwif_init(struct stmmac_priv *priv)
 		mac->tc = mac->tc ? : entry->tc;
 		mac->mmc = mac->mmc ? : entry->mmc;
 		mac->est = mac->est ? : entry->est;
+		mac->mac_pcs.ops = mac->mac_pcs.ops ?: entry->pcs;
 		mac->priv = priv;
 
 		priv->hw = mac;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
index 41b99f7e36e6..24b95d1fdb64 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
@@ -1,17 +1,54 @@
+#include <linux/phylink.h>
+
 #include "common.h"
 #include "stmmac_pcs.h"
 
-int dwmac_pcs_config(struct mac_device_info *hw, unsigned int neg_mode,
-		     phy_interface_t interface,
-		     const unsigned long *advertising)
+static int dwmac_pcs_validate(struct phylink_pcs *pcs, unsigned long *supported,
+			      const struct phylink_link_state *state)
+{
+	/* Only support in-band */
+	if (!test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, state->advertising))
+		return -EINVAL;
+
+	return 0;
+}
+
+static int dwmac_pcs_enable(struct phylink_pcs *pcs)
+{
+	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
+
+	stmmac_pcs_enable_irq(hw->priv, hw);
+
+	return 0;
+}
+
+static void dwmac_pcs_disable(struct phylink_pcs *pcs)
 {
+	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
+
+	stmmac_pcs_disable_irq(hw->priv, hw);
+}
+
+static int dwmac_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
+			    phy_interface_t interface,
+			    const unsigned long *advertising,
+			    bool permit_pause_to_mac)
+{
+	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
 	struct stmmac_priv *priv = hw->priv;
 	u32 val;
 
+	/* TODO Think about this:
+	 * + En/dis SGMII/RGMII IRQs based on the neg_mode value?
+	 * + Do we need to set PCS_CONTROL.TC?.. For SGMII MAC2MAC?
+	 * + The next is SGMII/RTBI/TBI-specific
+	 */
+
 	val = readl(priv->pcsaddr + PCS_AN_CTRL);
 
 	val |= PCS_AN_CTRL_ANE | PCS_AN_CTRL_RAN;
 
+	/* + The SGMRAL flag is SGMII-specific */
 	if (hw->ps)
 		val |= PCS_AN_CTRL_SGMRAL;
 
@@ -20,12 +57,40 @@ int dwmac_pcs_config(struct mac_device_info *hw, unsigned int neg_mode,
 	return 0;
 }
 
-void dwmac_pcs_get_state(struct mac_device_info *hw,
-			 struct phylink_link_state *state)
+static void dwmac_pcs_get_state(struct phylink_pcs *pcs,
+				struct phylink_link_state *state)
 {
+	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
 	struct stmmac_priv *priv = hw->priv;
 	u32 val;
 
+	val = stmmac_pcs_get_config_reg(priv, hw);
+
+	/* TODO The next is SGMII/RGMII/SMII-specific */
+	state->link = !!(val & PCS_CFG_LNKSTS);
+	if (!state->link)
+		return;
+
+	switch (FIELD_GET(PCS_CFG_LNKSPEED, val)) {
+	case PCS_CFG_LNKSPEED_2_5:
+		state->speed = SPEED_10;
+		break;
+	case PCS_CFG_LNKSPEED_25:
+		state->speed = SPEED_100;
+		break;
+	case PCS_CFG_LNKSPEED_250:
+		state->speed = SPEED_1000;
+		break;
+	default:
+		netdev_err(priv->dev, "Unknown speed detected\n");
+		break;
+	}
+
+	state->duplex = val & PCS_CFG_LNKMOD ? DUPLEX_FULL : DUPLEX_HALF;
+
+	/* TODO Check the PCS_AN_STATUS.Link status here?.. Note the flag is latched-low */
+
+	/* TODO The next is the TBI/RTBI-specific and seems to be valid if PCS_AN_STATUS.ANC */
 	val = readl(priv->pcsaddr + PCS_ANE_LPA);
 
 	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
@@ -49,7 +114,10 @@ void dwmac_pcs_get_state(struct mac_device_info *hw,
 				 state->lp_advertising);
 	}
 
-	/* TODO Make sure that STMMAC_PCS_PAUSE STMMAC_PCS_ASYM_PAUSE usage is legitimate */
+	/* TODO The databook says the encoding is defined in IEEE 802.3z,
+	 * Section 37.2.1.4. Do we need the STMMAC_PCS_PAUSE and
+	 * STMMAC_PCS_ASYM_PAUSE mask here?
+	 */
 	linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 			 state->lp_advertising,
 			 FIELD_GET(PCS_ANE_PSE, val) & STMMAC_PCS_PAUSE);
@@ -59,4 +127,10 @@ void dwmac_pcs_get_state(struct mac_device_info *hw,
 }
 
 const struct phylink_pcs_ops dwmac_pcs_ops = {
+	.pcs_validate = dwmac_pcs_validate,
+	.pcs_enable = dwmac_pcs_enable,
+	.pcs_disable = dwmac_pcs_disable,
+	.pcs_config = dwmac_pcs_config,
+	.pcs_get_state = dwmac_pcs_get_state,
+
 };
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
index 76badfd208b6..2baebb92bea7 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
@@ -47,6 +47,16 @@
 #define PCS_ANE_RFE_SHIFT	12
 #define PCS_ANE_ACK		BIT(14)		/* AN Base-page acknowledge */
 
+/* SGMII/RGMII/SMII link status register */
+#define PCS_CFG_LNKMOD		BIT(0)		/* Link Duplex Mode */
+#define PCS_CFG_LNKSPEED	GENMASK(2, 1)	/* Link Speed: */
+#define PCS_CFG_LNKSPEED_2_5	0x0		/* 2.5 MHz - 10 Mbps */
+#define PCS_CFG_LNKSPEED_25	0x1		/* 25 MHz - 100 Mbps */
+#define PCS_CFG_LNKSPEED_250	0x2		/* 250 MHz - 1000 Mbps */
+#define PCS_CFG_LNKSTS		BIT(3)		/* Link Up/Down Status */
+#define PCS_CFG_JABTO		BIT(4)		/* Jabber Timeout (SMII only) */
+#define PCS_CFG_FALSCARDET	BIT(5)		/* False Carrier (SMII only) */
+
 /**
  * dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR
  * @ioaddr: IO registers pointer
@@ -76,11 +86,4 @@ static inline void dwmac_pcs_isr(void __iomem *pcsaddr,
 	}
 }
 
-int dwmac_pcs_config(struct mac_device_info *hw, unsigned int neg_mode,
-		     phy_interface_t interface,
-		     const unsigned long *advertising);
-
-void dwmac_pcs_get_state(struct mac_device_info *hw,
-			 struct phylink_link_state *state);
-
 #endif /* __STMMAC_PCS_H__ */
-- 
2.43.0

[PATCH RFC net-next v2 15/17] net: stmmac: Move internal PCS ISR to stmmac_pcs.c

[Serge Semin]

Similarly to the PHYLINK PCS ops, the STMMAC PCS ISR can be now fully
implemented in the stmmac_pcs.c file. As before this change the resultant
method will be called from the DW GMAC and DW QoS Eth core interrupt
handlers.

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>

---

Note the AN Complete and Link state changes now cause the PHYLINK PCS
state update.
---
 .../ethernet/stmicro/stmmac/dwmac1000_core.c  |  9 +----
 .../net/ethernet/stmicro/stmmac/dwmac4_core.c |  9 +----
 .../net/ethernet/stmicro/stmmac/stmmac_pcs.c  | 33 +++++++++++++++++++
 .../net/ethernet/stmicro/stmmac/stmmac_pcs.h  | 31 ++---------------
 4 files changed, 38 insertions(+), 44 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index 332018ecd624..2d77ffd16f0a 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -296,14 +296,7 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,
 			x->irq_rx_path_exit_lpi_mode_n++;
 	}
 
-	dwmac_pcs_isr(hw->priv->pcsaddr, intr_status, x);
-
-	if (intr_status & PCS_RGSMIIIS_IRQ) {
-		/* TODO Dummy-read to clear the IRQ status */
-		readl(ioaddr + GMAC_RGSMIIIS);
-		phylink_pcs_change(&hw->mac_pcs, false);
-		x->irq_rgmii_n++;
-	}
+	dwmac_pcs_isr(hw, intr_status, x);
 
 	return ret;
 }
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 1487f5cc5249..c58dc20eddeb 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -860,14 +860,7 @@ static int dwmac4_irq_status(struct mac_device_info *hw,
 			x->irq_rx_path_exit_lpi_mode_n++;
 	}
 
-	dwmac_pcs_isr(hw->priv->pcsaddr, intr_status, x);
-
-	if (intr_status & PCS_RGSMIIIS_IRQ) {
-		/* TODO Dummy-read to clear the IRQ status */
-		readl(ioaddr + GMAC_PHYIF_CONTROL_STATUS);
-		phylink_pcs_change(&hw->mac_pcs, false);
-		x->irq_rgmii_n++;
-	}
+	dwmac_pcs_isr(hw, intr_status, x);
 
 	return ret;
 }
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
index 24b95d1fdb64..aac49f6472f0 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
@@ -134,3 +134,36 @@ const struct phylink_pcs_ops dwmac_pcs_ops = {
 	.pcs_get_state = dwmac_pcs_get_state,
 
 };
+
+void dwmac_pcs_isr(struct mac_device_info *hw, unsigned int intr_status,
+		   struct stmmac_extra_stats *x)
+{
+	struct stmmac_priv *priv = hw->priv;
+	bool an_status = false, sr_status = false;
+
+	if (intr_status & PCS_ANE_IRQ) {
+		x->irq_pcs_ane_n++;
+		an_status = true;
+	}
+
+	if (intr_status & PCS_LINK_IRQ) {
+		x->irq_pcs_link_n++;
+		an_status = true;
+	}
+
+	if (intr_status & PCS_RGSMIIIS_IRQ) {
+		x->irq_rgmii_n++;
+		sr_status = true;
+	}
+
+	/* Read the AN and SGMII/RGMII/SMII status regs to clear IRQ */
+	if (an_status)
+		readl(priv->pcsaddr + PCS_AN_STATUS);
+
+	if (sr_status)
+		readl(priv->pcsaddr + PCS_SRGMII_CSR);
+
+	/* Any PCS event shall trigger the PHYLINK PCS state update */
+	if (an_status || sr_status)
+		phylink_pcs_change(&hw->mac_pcs, false);
+}
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
index 2baebb92bea7..6e364285a4ef 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
@@ -23,6 +23,7 @@
 #define PCS_ANE_LPA		0x0c		/* ANE link partener ability */
 #define PCS_ANE_EXP		0x10		/* ANE expansion */
 #define PCS_TBI_EXT		0x14		/* TBI extended status */
+#define PCS_SRGMII_CSR		0x18		/* SGMII/RGMII/SMII CSR */
 
 /* AN Configuration defines */
 #define PCS_AN_CTRL_RAN		BIT(9)		/* Restart Auto-Negotiation */
@@ -57,33 +58,7 @@
 #define PCS_CFG_JABTO		BIT(4)		/* Jabber Timeout (SMII only) */
 #define PCS_CFG_FALSCARDET	BIT(5)		/* False Carrier (SMII only) */
 
-/**
- * dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR
- * @ioaddr: IO registers pointer
- * @intr_status: GMAC core interrupt status
- * @x: pointer to log these events as stats
- * Description: it is the ISR for PCS events: Auto-Negotiation Completed and
- * Link status.
- */
-static inline void dwmac_pcs_isr(void __iomem *pcsaddr,
-				 unsigned int intr_status,
-				 struct stmmac_extra_stats *x)
-{
-	u32 val = readl(pcsaddr + PCS_AN_STATUS);
-
-	if (intr_status & PCS_ANE_IRQ) {
-		x->irq_pcs_ane_n++;
-		if (val & PCS_AN_STATUS_ANC)
-			pr_info("stmmac_pcs: ANE process completed\n");
-	}
-
-	if (intr_status & PCS_LINK_IRQ) {
-		x->irq_pcs_link_n++;
-		if (val & PCS_AN_STATUS_LS)
-			pr_info("stmmac_pcs: Link Up\n");
-		else
-			pr_info("stmmac_pcs: Link Down\n");
-	}
-}
+void dwmac_pcs_isr(struct mac_device_info *hw, unsigned int intr_status,
+		   struct stmmac_extra_stats *x);
 
 #endif /* __STMMAC_PCS_H__ */
-- 
2.43.0

[PATCH RFC net-next v2 16/17] net: stmmac: Move internal PCS init method to stmmac_pcs.c

[Serge Semin]

Currently the internal PCS initialization procedure is split up into
several functions and special flags:

1. stmmac_check_pcs_mode() - determine the internal PCS based on the
specified interface and init the mac_device_info::pcs field with the
respective flag (STMMAC_PCS_RGMII or STMMAC_PCS_SGMII);

2. stmmac_ops::phylink_select_pcs() - callback specific for the DW GMAC
and DW QoS Eth IP-cores which returns the pointer to the phylink_pcs
structure if any of the STMMAC_PCS_RGMII or STMMAC_PCS_SGMII flag is found
in the mac_device_info::pcs field.

The initialization procedure described above can be simplified by
converting the stmmac_check_pcs_mode() to the PCS-init method defined in
stmmac_pcs.c, which besides would take the STMMAC_FLAG_HAS_INTEGRATED_PCS
flag into account. Seeing the RGMII and SGMII MAC-interfaces can be only
found on the DW GMAC and DW QoS Eth, the stmmac_ops::phylink_select_pcs()
callbacks content can be freely moved right into the generic
phylink_mac_ops::mac_select_pcs() function.

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>

---

The change looks very promising and greatly simplifying the internal PCS
initialization procedure by providing a single coherent method activating
the internal PCS capability based on the requested interface and the
detected DW MAC HW-capability.
---
 .../ethernet/stmicro/stmmac/dwmac1000_core.c  | 16 +------------
 .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 17 +------------
 drivers/net/ethernet/stmicro/stmmac/hwif.h    | 15 ++----------
 .../net/ethernet/stmicro/stmmac/stmmac_main.c | 24 ++++---------------
 .../net/ethernet/stmicro/stmmac/stmmac_mdio.c |  3 +++
 .../net/ethernet/stmicro/stmmac/stmmac_pcs.c  | 15 ++++++++++++
 .../net/ethernet/stmicro/stmmac/stmmac_pcs.h  |  2 ++
 7 files changed, 28 insertions(+), 64 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index 2d77ffd16f0a..2fbb853cc19c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -16,7 +16,7 @@
 #include <linux/slab.h>
 #include <linux/ethtool.h>
 #include <linux/io.h>
-#include <linux/phylink.h>
+
 #include "stmmac.h"
 #include "stmmac_pcs.h"
 #include "dwmac1000.h"
@@ -388,17 +388,6 @@ static u16 dwmac1000_pcs_get_config_reg(struct mac_device_info *hw)
 	return FIELD_GET(GMAC_RGSMIIIS_CONFIG_REG, val);
 }
 
-static struct phylink_pcs *
-dwmac1000_phylink_select_pcs(struct stmmac_priv *priv,
-			     phy_interface_t interface)
-{
-	if (priv->hw->pcs & STMMAC_PCS_RGMII ||
-	    priv->hw->pcs & STMMAC_PCS_SGMII)
-		return &priv->hw->mac_pcs;
-
-	return NULL;
-}
-
 static void dwmac1000_debug(struct stmmac_priv *priv, void __iomem *ioaddr,
 			    struct stmmac_extra_stats *x,
 			    u32 rx_queues, u32 tx_queues)
@@ -489,7 +478,6 @@ static void dwmac1000_set_mac_loopback(void __iomem *ioaddr, bool enable)
 
 const struct stmmac_ops dwmac1000_ops = {
 	.core_init = dwmac1000_core_init,
-	.phylink_select_pcs = dwmac1000_phylink_select_pcs,
 	.set_mac = stmmac_set_mac,
 	.rx_ipc = dwmac1000_rx_ipc_enable,
 	.dump_regs = dwmac1000_dump_regs,
@@ -541,7 +529,5 @@ int dwmac1000_setup(struct stmmac_priv *priv)
 	mac->mii.clk_csr_shift = 2;
 	mac->mii.clk_csr_mask = GENMASK(5, 2);
 
-	mac->mac_pcs.neg_mode = true;
-
 	return 0;
 }
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index c58dc20eddeb..f5449f0962ad 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -14,7 +14,7 @@
 #include <linux/slab.h>
 #include <linux/ethtool.h>
 #include <linux/io.h>
-#include <linux/phylink.h>
+
 #include "stmmac.h"
 #include "stmmac_pcs.h"
 #include "dwmac4.h"
@@ -780,16 +780,6 @@ static void dwmac4_flow_ctrl(struct mac_device_info *hw, unsigned int duplex,
 	}
 }
 
-static struct phylink_pcs *
-dwmac4_phylink_select_pcs(struct stmmac_priv *priv, phy_interface_t interface)
-{
-	if (priv->hw->pcs & STMMAC_PCS_RGMII ||
-	    priv->hw->pcs & STMMAC_PCS_SGMII)
-		return &priv->hw->mac_pcs;
-
-	return NULL;
-}
-
 static int dwmac4_irq_mtl_status(struct stmmac_priv *priv,
 				 struct mac_device_info *hw, u32 chan)
 {
@@ -1178,7 +1168,6 @@ static void dwmac4_set_hw_vlan_mode(struct mac_device_info *hw)
 const struct stmmac_ops dwmac4_ops = {
 	.core_init = dwmac4_core_init,
 	.update_caps = dwmac4_update_caps,
-	.phylink_select_pcs = dwmac4_phylink_select_pcs,
 	.set_mac = stmmac_set_mac,
 	.rx_ipc = dwmac4_rx_ipc_enable,
 	.rx_queue_enable = dwmac4_rx_queue_enable,
@@ -1224,7 +1213,6 @@ const struct stmmac_ops dwmac4_ops = {
 const struct stmmac_ops dwmac410_ops = {
 	.core_init = dwmac4_core_init,
 	.update_caps = dwmac4_update_caps,
-	.phylink_select_pcs = dwmac4_phylink_select_pcs,
 	.set_mac = stmmac_dwmac4_set_mac,
 	.rx_ipc = dwmac4_rx_ipc_enable,
 	.rx_queue_enable = dwmac4_rx_queue_enable,
@@ -1274,7 +1262,6 @@ const struct stmmac_ops dwmac410_ops = {
 const struct stmmac_ops dwmac510_ops = {
 	.core_init = dwmac4_core_init,
 	.update_caps = dwmac4_update_caps,
-	.phylink_select_pcs = dwmac4_phylink_select_pcs,
 	.set_mac = stmmac_dwmac4_set_mac,
 	.rx_ipc = dwmac4_rx_ipc_enable,
 	.rx_queue_enable = dwmac4_rx_queue_enable,
@@ -1389,7 +1376,5 @@ int dwmac4_setup(struct stmmac_priv *priv)
 	mac->mii.clk_csr_mask = GENMASK(11, 8);
 	mac->num_vlan = dwmac4_get_num_vlan(priv->ioaddr);
 
-	mac->mac_pcs.neg_mode = true;
-
 	return 0;
 }
diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h
index 3d39417e906d..4bacfe8a18e0 100644
--- a/drivers/net/ethernet/stmicro/stmmac/hwif.h
+++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h
@@ -18,17 +18,13 @@
 	} \
 	__result; \
 })
-#define stmmac_do_typed_callback(__type, __fail_ret, __priv, __module, \
-				 __cname,  __arg0, __args...) \
+#define stmmac_do_callback(__priv, __module, __cname,  __arg0, __args...) \
 ({ \
-	__type __result = __fail_ret; \
+	int __result = -EINVAL; \
 	if ((__priv)->hw->__module && (__priv)->hw->__module->__cname) \
 		__result = (__priv)->hw->__module->__cname((__arg0), ##__args); \
 	__result; \
 })
-#define stmmac_do_callback(__priv, __module, __cname,  __arg0, __args...) \
-	stmmac_do_typed_callback(int, -EINVAL, __priv, __module, __cname, \
-				 __arg0, ##__args)
 
 struct stmmac_extra_stats;
 struct stmmac_priv;
@@ -315,9 +311,6 @@ struct stmmac_ops {
 	void (*core_init)(struct mac_device_info *hw, struct net_device *dev);
 	/* Update MAC capabilities */
 	void (*update_caps)(struct stmmac_priv *priv);
-	/* Get phylink PCS (for MAC */
-	struct phylink_pcs *(*phylink_select_pcs)(struct stmmac_priv *priv,
-						  phy_interface_t interface);
 	/* Enable the MAC RX/TX */
 	void (*set_mac)(void __iomem *ioaddr, bool enable);
 	/* Enable and verify that the IPC module is supported */
@@ -439,10 +432,6 @@ struct stmmac_ops {
 	stmmac_do_void_callback(__priv, mac, core_init, __args)
 #define stmmac_mac_update_caps(__priv) \
 	stmmac_do_void_callback(__priv, mac, update_caps, __priv)
-#define stmmac_mac_phylink_select_pcs(__priv, __interface) \
-	stmmac_do_typed_callback(struct phylink_pcs *, ERR_PTR(-EOPNOTSUPP), \
-				 __priv, mac, phylink_select_pcs, __priv,\
-				 __interface)
 #define stmmac_mac_set(__priv, __args...) \
 	stmmac_do_void_callback(__priv, mac, set_mac, __args)
 #define stmmac_rx_ipc(__priv, __args...) \
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 72c2d3e2c121..743d356f6d12 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -950,13 +950,16 @@ static struct phylink_pcs *stmmac_mac_select_pcs(struct phylink_config *config,
 {
 	struct stmmac_priv *priv = netdev_priv(to_net_dev(config->dev));
 
+	if (priv->hw->pcs)
+		return &priv->hw->mac_pcs;
+
 	if (priv->hw->xpcs)
 		return &priv->hw->xpcs->pcs;
 
 	if (priv->hw->phylink_pcs)
 		return priv->hw->phylink_pcs;
 
-	return stmmac_mac_phylink_select_pcs(priv, interface);
+	return NULL;
 }
 
 static void stmmac_mac_config(struct phylink_config *config, unsigned int mode,
@@ -1121,23 +1124,6 @@ static const struct phylink_mac_ops stmmac_phylink_mac_ops = {
 	.mac_link_up = stmmac_mac_link_up,
 };
 
-/**
- * stmmac_check_pcs_mode - verify if RGMII/SGMII is supported
- * @priv: driver private structure
- * Description: this is to verify if the HW supports the PCS.
- * Physical Coding Sublayer (PCS) interface that can be used when the MAC is
- * configured for the TBI, RTBI, or SGMII PHY interface.
- */
-static void stmmac_check_pcs_mode(struct stmmac_priv *priv)
-{
-	int interface = priv->plat->mac_interface;
-
-	if (phy_interface_mode_is_rgmii(interface))
-		priv->hw->pcs = STMMAC_PCS_RGMII;
-	else if (priv->dma_cap.pcs && interface == PHY_INTERFACE_MODE_SGMII)
-		priv->hw->pcs = STMMAC_PCS_SGMII;
-}
-
 /**
  * stmmac_init_phy - PHY initialization
  * @dev: net device structure
@@ -7704,8 +7690,6 @@ int stmmac_dvr_probe(struct device *device,
 	else
 		stmmac_clk_csr_set(priv);
 
-	stmmac_check_pcs_mode(priv);
-
 	pm_runtime_get_noresume(device);
 	pm_runtime_set_active(device);
 	if (!pm_runtime_enabled(device))
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
index aa43117134d3..985b4b8c021f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
@@ -22,6 +22,7 @@
 
 #include "dwxgmac2.h"
 #include "stmmac.h"
+#include "stmmac_pcs.h"
 
 #define MII_BUSY 0x00000001
 #define MII_WRITE 0x00000002
@@ -505,6 +506,8 @@ int stmmac_pcs_setup(struct net_device *ndev)
 	priv = netdev_priv(ndev);
 	mode = priv->plat->phy_interface;
 
+	dwmac_pcs_init(priv->hw);
+
 	if (priv->plat->pcs_init) {
 		ret = priv->plat->pcs_init(priv);
 	} else if (priv->plat->mdio_bus_data &&
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
index aac49f6472f0..fdfc95299f89 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c
@@ -167,3 +167,18 @@ void dwmac_pcs_isr(struct mac_device_info *hw, unsigned int intr_status,
 	if (an_status || sr_status)
 		phylink_pcs_change(&hw->mac_pcs, false);
 }
+
+void dwmac_pcs_init(struct mac_device_info *hw)
+{
+	struct stmmac_priv *priv = hw->priv;
+	int interface = priv->plat->mac_interface;
+
+	if (priv->plat->flags & STMMAC_FLAG_HAS_INTEGRATED_PCS)
+		return;
+	else if (phy_interface_mode_is_rgmii(interface))
+		hw->pcs = STMMAC_PCS_RGMII;
+	else if (priv->dma_cap.pcs && interface == PHY_INTERFACE_MODE_SGMII)
+		hw->pcs = STMMAC_PCS_SGMII;
+
+	hw->mac_pcs.neg_mode = true;
+}
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
index 6e364285a4ef..a17e5b37c411 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
@@ -61,4 +61,6 @@
 void dwmac_pcs_isr(struct mac_device_info *hw, unsigned int intr_status,
 		   struct stmmac_extra_stats *x);
 
+void dwmac_pcs_init(struct mac_device_info *hw);
+
 #endif /* __STMMAC_PCS_H__ */
-- 
2.43.0

[PATCH RFC net-next v2 17/17] net: stmmac: pcs: Drop the _SHIFT macros

[Serge Semin]

The PCS_ANE_PSE_SHIFT and PCS_ANE_RFE_SHIFT are unused anyway. Moreover
PCS_ANE_PSE and PCS_ANE_RFE are the respective field masks. So the
FIELD_GET()/FIELD_SET() macro-functions can be used to get/set the fields
content. Drop the _SHIFT macros for good then.

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
index a17e5b37c411..0f15c9898788 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
@@ -43,9 +43,7 @@
 #define PCS_ANE_FD		BIT(5)		/* AN Full-duplex flag */
 #define PCS_ANE_HD		BIT(6)		/* AN Half-duplex flag */
 #define PCS_ANE_PSE		GENMASK(8, 7)	/* AN Pause Encoding */
-#define PCS_ANE_PSE_SHIFT	7
 #define PCS_ANE_RFE		GENMASK(13, 12)	/* AN Remote Fault Encoding */
-#define PCS_ANE_RFE_SHIFT	12
 #define PCS_ANE_ACK		BIT(14)		/* AN Base-page acknowledge */
 
 /* SGMII/RGMII/SMII link status register */
-- 
2.43.0

Re: [PATCH RFC net-next v2 16/17] net: stmmac: Move internal PCS init method to stmmac_pcs.c

[Russell King (Oracle)]

On Mon, Jun 24, 2024 at 04:26:33PM +0300, Serge Semin wrote:
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> index 72c2d3e2c121..743d356f6d12 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> @@ -950,13 +950,16 @@ static struct phylink_pcs *stmmac_mac_select_pcs(struct phylink_config *config,
>  {
>  	struct stmmac_priv *priv = netdev_priv(to_net_dev(config->dev));
>  
> +	if (priv->hw->pcs)
> +		return &priv->hw->mac_pcs;
> +
>  	if (priv->hw->xpcs)
>  		return &priv->hw->xpcs->pcs;
>  
>  	if (priv->hw->phylink_pcs)
>  		return priv->hw->phylink_pcs;
>  
> -	return stmmac_mac_phylink_select_pcs(priv, interface);
> +	return NULL;

I really really don't like this due to:

1. I spent a long time working out what the priority here should be, and
you've just thrown all that work away by changing it - to something that
I believe is incorrect.

2. I want to eventually see this function checking the interface type
before just handing out a random PCS, and it was my intention to
eventually that into the MACs own select_pcs() methods. Getting rid of
those methods means that the MACs themselves now can't make the
decision which is where that should be.

3. When operating in RGMII "inband" mode, the .pcs_config etc doesn't
make much sense (we're probably accessing registers that don't exist)
and I had plans to split this into a RGMII "PCS" which was just a PCS
that implemented .pcs_get_state(), a stub .pcs_config(), and a separate
fully-featured "SGMII PCS".

So, I would like to eventually see here something like:

	if (priv->hw->xpcs)
		return &priv->hw->xpcs->pcs;

	if (priv->hw->phylink_pcs)
		return priv->hw->phylink_pcs;

	if (!(priv->plat->flags & STMMAC_FLAG_HAS_INTEGRATED_PCS)) {
		if (phy_interface_mode_is_rgmii(priv->plat->mac_interface))
			return &priv->hw->mac_rgmii_pcs;

		if (priv->dma_cap.pcs &&
		    priv->plat->mac_interface == PHY_INTERFACE_MODE_SGMII)
			return &priv->hw->mac_sgmii_pcs;
	}

	return NULL;

> +void dwmac_pcs_init(struct mac_device_info *hw)
> +{
> +	struct stmmac_priv *priv = hw->priv;
> +	int interface = priv->plat->mac_interface;
> +
> +	if (priv->plat->flags & STMMAC_FLAG_HAS_INTEGRATED_PCS)
> +		return;
> +	else if (phy_interface_mode_is_rgmii(interface))
> +		hw->pcs = STMMAC_PCS_RGMII;
> +	else if (priv->dma_cap.pcs && interface == PHY_INTERFACE_MODE_SGMII)
> +		hw->pcs = STMMAC_PCS_SGMII;
> +
> +	hw->mac_pcs.neg_mode = true;
> +}

Please move "hw->mac_pcs.neg_mode = true;" to where the PCS method
functions are implemented - it determines whether the PCS method
functions take the AN mode or the neg mode, and this is a property of
their implementations. It should not be split away from them.

Thanks.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

Re: [PATCH RFC net-next v2 17/17] net: stmmac: pcs: Drop the _SHIFT macros

[Russell King (Oracle)]

On Mon, Jun 24, 2024 at 04:26:34PM +0300, Serge Semin wrote:
> The PCS_ANE_PSE_SHIFT and PCS_ANE_RFE_SHIFT are unused anyway. Moreover
> PCS_ANE_PSE and PCS_ANE_RFE are the respective field masks. So the
> FIELD_GET()/FIELD_SET() macro-functions can be used to get/set the fields
> content. Drop the _SHIFT macros for good then.
> 
> Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
> ---
>  drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> index a17e5b37c411..0f15c9898788 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> @@ -43,9 +43,7 @@
>  #define PCS_ANE_FD		BIT(5)		/* AN Full-duplex flag */
>  #define PCS_ANE_HD		BIT(6)		/* AN Half-duplex flag */
>  #define PCS_ANE_PSE		GENMASK(8, 7)	/* AN Pause Encoding */
> -#define PCS_ANE_PSE_SHIFT	7
>  #define PCS_ANE_RFE		GENMASK(13, 12)	/* AN Remote Fault Encoding */
> -#define PCS_ANE_RFE_SHIFT	12
>  #define PCS_ANE_ACK		BIT(14)		/* AN Base-page acknowledge */

I would actually like to see all these go away.

PCS_ANE_FD == LPA_1000XFULL
PCS_ANE_HD == LPA_1000XHALF
PCS_ANE_PSE == LPA_1000XPAUSE and LPA_1000XPAUSE_ASYM
PCS_ANE_RFE == LPA_RESV and LPA_RFAULT
PCS_ANE_ACK == LPA_LPACK

Isn't it rather weird that the field layout matches 802.3z aka
1000base-X and not SGMII? This layout would not make sense for Cisco
SGMII as it loses the speed information conveyed by the Cisco SGMII
control word.

This isn't a case of the manufacturer using "SGMII" to mean a serial
gigabit media independent interface that supports 1000base-X
(PHY_INTERFACE_MODE_1000BASEX) rather than Cisco SGMII
(PHY_INTERFACE_MODE_SGMII) ?

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

Re: [PATCH RFC net-next v2 10/17] net: stmmac: Introduce internal PCS offset-based CSR access

[Russell King (Oracle)]

On Mon, Jun 24, 2024 at 04:26:27PM +0300, Serge Semin wrote:
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
> index 80eb72bc6311..d0bcebe87ee8 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
> @@ -633,7 +633,7 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
>  			      RGMII_CONFIG2_RGMII_CLK_SEL_CFG,
>  			      RGMII_IO_MACRO_CONFIG2);
>  		ethqos_set_serdes_speed(ethqos, SPEED_2500);
> -		stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 0, 0, 0);
> +		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 0, 0, 0);
>  		break;
>  	case SPEED_1000:
>  		val &= ~ETHQOS_MAC_CTRL_PORT_SEL;
> @@ -641,12 +641,12 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
>  			      RGMII_CONFIG2_RGMII_CLK_SEL_CFG,
>  			      RGMII_IO_MACRO_CONFIG2);
>  		ethqos_set_serdes_speed(ethqos, SPEED_1000);
> -		stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0);
> +		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 1, 0, 0);
>  		break;
>  	case SPEED_100:
>  		val |= ETHQOS_MAC_CTRL_PORT_SEL | ETHQOS_MAC_CTRL_SPEED_MODE;
>  		ethqos_set_serdes_speed(ethqos, SPEED_1000);
> -		stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0);
> +		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 1, 0, 0);
>  		break;
>  	case SPEED_10:
>  		val |= ETHQOS_MAC_CTRL_PORT_SEL;
> @@ -656,7 +656,7 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
>  					 SGMII_10M_RX_CLK_DVDR),
>  			      RGMII_IO_MACRO_CONFIG);
>  		ethqos_set_serdes_speed(ethqos, SPEED_1000);
> -		stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0);
> +		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 1, 0, 0);
>  		break;
>  	}
>  

I think a better preparatory patch (given what you do in future patches)
would be to change all of these to:

	ethqos_pcs_set_inband(priv, {false | true});

which would be:

static void ethqos_pcs_set_inband(struct stmmac_priv *priv, bool enable)
{
	stmmac_pcs_ctrl_ane(priv, priv->ioaddr, enable, 0, 0);
}

which then means this patch becomes a single line, and your subsequent
patch just has to replace stmmac_pcs_ctrl_ane() with its open-coded
equivalent.

> diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.c b/drivers/net/ethernet/stmicro/stmmac/hwif.c
> index 84fd57b76fad..3666893acb69 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/hwif.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.c
> @@ -6,6 +6,7 @@
>  
>  #include "common.h"
>  #include "stmmac.h"
> +#include "stmmac_pcs.h"
>  #include "stmmac_ptp.h"
>  #include "stmmac_est.h"
>  
> @@ -116,6 +117,7 @@ static const struct stmmac_hwif_entry {
>  	const void *tc;
>  	const void *mmc;
>  	const void *est;
> +	const void *pcs;

I'm not a fan of void pointers. common.h includes linux/phylink.h, which
will define struct phylink_pcs_ops, so there is no reason not to declare
this as:

	const struct phylink_pcs_ops *pcs;

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

Re: [PATCH RFC net-next v2 14/17] net: stmmac: Move internal PCS PHYLINK ops to stmmac_pcs.c

[Russell King (Oracle)]

On Mon, Jun 24, 2024 at 04:26:31PM +0300, Serge Semin wrote:
> @@ -621,7 +548,6 @@ int dwmac1000_setup(struct stmmac_priv *priv)
>  	mac->mii.clk_csr_shift = 2;
>  	mac->mii.clk_csr_mask = GENMASK(5, 2);
>  
> -	mac->mac_pcs.ops = &dwmac1000_mii_pcs_ops;
>  	mac->mac_pcs.neg_mode = true;

"mac->mac_pcs.neg_mode = true;" is a property of the "ops" so should
move with it.

> @@ -1475,7 +1396,6 @@ int dwmac4_setup(struct stmmac_priv *priv)
>  	mac->mii.clk_csr_mask = GENMASK(11, 8);
>  	mac->num_vlan = dwmac4_get_num_vlan(priv->ioaddr);
>  
> -	mac->mac_pcs.ops = &dwmac4_mii_pcs_ops;
>  	mac->mac_pcs.neg_mode = true;

Also applies here.

> diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.c b/drivers/net/ethernet/stmicro/stmmac/hwif.c
> index 3666893acb69..c42fb2437948 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/hwif.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.c
> @@ -363,6 +363,7 @@ int stmmac_hwif_init(struct stmmac_priv *priv)
>  		mac->tc = mac->tc ? : entry->tc;
>  		mac->mmc = mac->mmc ? : entry->mmc;
>  		mac->est = mac->est ? : entry->est;
> +		mac->mac_pcs.ops = mac->mac_pcs.ops ?: entry->pcs;

Removing both of the above means that mac->mac_pcs.ops won't ever be set
prior to this, so this whole thing should just be:

		mac->mac_pcs.ops = entry->pcs;
		mac->mac_pcs.neg_mode = true;

> +static void dwmac_pcs_get_state(struct phylink_pcs *pcs,
> +				struct phylink_link_state *state)
>  {
> +	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
>  	struct stmmac_priv *priv = hw->priv;
>  	u32 val;
>  
> +	val = stmmac_pcs_get_config_reg(priv, hw);
> +
> +	/* TODO The next is SGMII/RGMII/SMII-specific */
> +	state->link = !!(val & PCS_CFG_LNKSTS);
> +	if (!state->link)
> +		return;
> +
> +	switch (FIELD_GET(PCS_CFG_LNKSPEED, val)) {
> +	case PCS_CFG_LNKSPEED_2_5:
> +		state->speed = SPEED_10;
> +		break;
> +	case PCS_CFG_LNKSPEED_25:
> +		state->speed = SPEED_100;
> +		break;
> +	case PCS_CFG_LNKSPEED_250:
> +		state->speed = SPEED_1000;
> +		break;
> +	default:
> +		netdev_err(priv->dev, "Unknown speed detected\n");
> +		break;
> +	}
> +
> +	state->duplex = val & PCS_CFG_LNKMOD ? DUPLEX_FULL : DUPLEX_HALF;
> +
> +	/* TODO Check the PCS_AN_STATUS.Link status here?.. Note the flag is latched-low */
> +
> +	/* TODO The next is the TBI/RTBI-specific and seems to be valid if PCS_AN_STATUS.ANC */
>  	val = readl(priv->pcsaddr + PCS_ANE_LPA);

I thought these registers only existed of dma_cap.pcs is true ? If we
start checking PCS_AN_STATUS.Link here, and this register reads as
zeros, doesn't it mean that RMGII inband mode won't ever signal link
up?

>  
> -	/* TODO Make sure that STMMAC_PCS_PAUSE STMMAC_PCS_ASYM_PAUSE usage is legitimate */
> +	/* TODO The databook says the encoding is defined in IEEE 802.3z,
> +	 * Section 37.2.1.4. Do we need the STMMAC_PCS_PAUSE and
> +	 * STMMAC_PCS_ASYM_PAUSE mask here?
> +	 */
>  	linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT,
>  			 state->lp_advertising,
>  			 FIELD_GET(PCS_ANE_PSE, val) & STMMAC_PCS_PAUSE);

If it's 802.3z aka 1000base-X format, then yes, we should be using
these bits if we are getting state from this register.

If TBI/RTBI is ever used, rather than trying to shoe-horn it all into
these functions, please consider splitting them into separate PCSes,
and sharing code between them e.g. using common functions called from
the method functions or shared method functions where appropriate.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

Re: [PATCH RFC net-next v2 10/17] net: stmmac: Introduce internal PCS offset-based CSR access

[Serge Semin]

On Fri, Jun 28, 2024 at 03:54:13PM +0100, Russell King (Oracle) wrote:
> On Mon, Jun 24, 2024 at 04:26:27PM +0300, Serge Semin wrote:
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
> > index 80eb72bc6311..d0bcebe87ee8 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
> > @@ -633,7 +633,7 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
> >  			      RGMII_CONFIG2_RGMII_CLK_SEL_CFG,
> >  			      RGMII_IO_MACRO_CONFIG2);
> >  		ethqos_set_serdes_speed(ethqos, SPEED_2500);
> > -		stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 0, 0, 0);
> > +		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 0, 0, 0);
> >  		break;
> >  	case SPEED_1000:
> >  		val &= ~ETHQOS_MAC_CTRL_PORT_SEL;
> > @@ -641,12 +641,12 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
> >  			      RGMII_CONFIG2_RGMII_CLK_SEL_CFG,
> >  			      RGMII_IO_MACRO_CONFIG2);
> >  		ethqos_set_serdes_speed(ethqos, SPEED_1000);
> > -		stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0);
> > +		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 1, 0, 0);
> >  		break;
> >  	case SPEED_100:
> >  		val |= ETHQOS_MAC_CTRL_PORT_SEL | ETHQOS_MAC_CTRL_SPEED_MODE;
> >  		ethqos_set_serdes_speed(ethqos, SPEED_1000);
> > -		stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0);
> > +		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 1, 0, 0);
> >  		break;
> >  	case SPEED_10:
> >  		val |= ETHQOS_MAC_CTRL_PORT_SEL;
> > @@ -656,7 +656,7 @@ static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)
> >  					 SGMII_10M_RX_CLK_DVDR),
> >  			      RGMII_IO_MACRO_CONFIG);
> >  		ethqos_set_serdes_speed(ethqos, SPEED_1000);
> > -		stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, 0, 0);
> > +		stmmac_pcs_ctrl_ane(priv, priv->pcsaddr, 1, 0, 0);
> >  		break;
> >  	}
> >  
> 

> I think a better preparatory patch (given what you do in future patches)
> would be to change all of these to:
> 
> 	ethqos_pcs_set_inband(priv, {false | true});
> 
> which would be:
> 
> static void ethqos_pcs_set_inband(struct stmmac_priv *priv, bool enable)
> {
> 	stmmac_pcs_ctrl_ane(priv, priv->ioaddr, enable, 0, 0);
> }
> 
> which then means this patch becomes a single line, and your subsequent
> patch just has to replace stmmac_pcs_ctrl_ane() with its open-coded
> equivalent.

Why not. We can introduce one more preparation patch as you suggest.

> 
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.c b/drivers/net/ethernet/stmicro/stmmac/hwif.c
> > index 84fd57b76fad..3666893acb69 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/hwif.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.c
> > @@ -6,6 +6,7 @@
> >  
> >  #include "common.h"
> >  #include "stmmac.h"
> > +#include "stmmac_pcs.h"
> >  #include "stmmac_ptp.h"
> >  #include "stmmac_est.h"
> >  
> > @@ -116,6 +117,7 @@ static const struct stmmac_hwif_entry {
> >  	const void *tc;
> >  	const void *mmc;
> >  	const void *est;
> > +	const void *pcs;
> 

> I'm not a fan of void pointers. common.h includes linux/phylink.h, which
> will define struct phylink_pcs_ops, so there is no reason not to declare
> this as:
> 
> 	const struct phylink_pcs_ops *pcs;

So am I. But in this case we have all the ops fields defined as voids.
So I just followed the local convention.

Anyway, I failed to find out the reason of using void pointers here.
So locally, in one of my cleanup patchesets, I've got them converted
to the typed pointers. I can submit that patch as another preparation
patch to this series. Then we can use the pointer to phylink_pcs_ops
with no doubts. What do you think?

-Serge(y)

> 
> -- 
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

Re: [PATCH RFC net-next v2 14/17] net: stmmac: Move internal PCS PHYLINK ops to stmmac_pcs.c

[Serge Semin]

On Fri, Jun 28, 2024 at 04:07:46PM +0100, Russell King (Oracle) wrote:
> On Mon, Jun 24, 2024 at 04:26:31PM +0300, Serge Semin wrote:
> > @@ -621,7 +548,6 @@ int dwmac1000_setup(struct stmmac_priv *priv)
> >  	mac->mii.clk_csr_shift = 2;
> >  	mac->mii.clk_csr_mask = GENMASK(5, 2);
> >  
> > -	mac->mac_pcs.ops = &dwmac1000_mii_pcs_ops;
> >  	mac->mac_pcs.neg_mode = true;
> 
> "mac->mac_pcs.neg_mode = true;" is a property of the "ops" so should
> move with it.
> 
> > @@ -1475,7 +1396,6 @@ int dwmac4_setup(struct stmmac_priv *priv)
> >  	mac->mii.clk_csr_mask = GENMASK(11, 8);
> >  	mac->num_vlan = dwmac4_get_num_vlan(priv->ioaddr);
> >  
> > -	mac->mac_pcs.ops = &dwmac4_mii_pcs_ops;
> >  	mac->mac_pcs.neg_mode = true;
> 
> Also applies here.
> 
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.c b/drivers/net/ethernet/stmicro/stmmac/hwif.c
> > index 3666893acb69..c42fb2437948 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/hwif.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.c
> > @@ -363,6 +363,7 @@ int stmmac_hwif_init(struct stmmac_priv *priv)
> >  		mac->tc = mac->tc ? : entry->tc;
> >  		mac->mmc = mac->mmc ? : entry->mmc;
> >  		mac->est = mac->est ? : entry->est;
> > +		mac->mac_pcs.ops = mac->mac_pcs.ops ?: entry->pcs;
> 

> Removing both of the above means that mac->mac_pcs.ops won't ever be set
> prior to this, so this whole thing should just be:
> 
> 		mac->mac_pcs.ops = entry->pcs;
> 		mac->mac_pcs.neg_mode = true;

Actually, no. mac->mac_pcs.ops can be set by the platform-specific
plat_stmmacenet_data::setup() method.

> 
> > +static void dwmac_pcs_get_state(struct phylink_pcs *pcs,
> > +				struct phylink_link_state *state)
> >  {
> > +	struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
> >  	struct stmmac_priv *priv = hw->priv;
> >  	u32 val;
> >  
> > +	val = stmmac_pcs_get_config_reg(priv, hw);
> > +
> > +	/* TODO The next is SGMII/RGMII/SMII-specific */
> > +	state->link = !!(val & PCS_CFG_LNKSTS);
> > +	if (!state->link)
> > +		return;
> > +
> > +	switch (FIELD_GET(PCS_CFG_LNKSPEED, val)) {
> > +	case PCS_CFG_LNKSPEED_2_5:
> > +		state->speed = SPEED_10;
> > +		break;
> > +	case PCS_CFG_LNKSPEED_25:
> > +		state->speed = SPEED_100;
> > +		break;
> > +	case PCS_CFG_LNKSPEED_250:
> > +		state->speed = SPEED_1000;
> > +		break;
> > +	default:
> > +		netdev_err(priv->dev, "Unknown speed detected\n");
> > +		break;
> > +	}
> > +
> > +	state->duplex = val & PCS_CFG_LNKMOD ? DUPLEX_FULL : DUPLEX_HALF;
> > +
> > +	/* TODO Check the PCS_AN_STATUS.Link status here?.. Note the flag is latched-low */
> > +
> > +	/* TODO The next is the TBI/RTBI-specific and seems to be valid if PCS_AN_STATUS.ANC */
> >  	val = readl(priv->pcsaddr + PCS_ANE_LPA);
> 

> I thought these registers only existed of dma_cap.pcs is true ?

Right. The AN-registers are SGMII/TBI/RTBI-specific.

> If we
> start checking PCS_AN_STATUS.Link here, and this register reads as
> zeros, doesn't it mean that RMGII inband mode won't ever signal link
> up?

Right. The PCS_AN_STATUS.Link should be checked for the SGMII (and
TBI/RTBI) only. The databooks defines the flag as follows:

DW GMAC v3.73a:
Link Status   This bit indicates whether the data channel (link) is up or
R_SS_SC_LLO   down. For the TBI, RTBI or SGMII interfaces, if ANEG is going
              on, data cannot be transferred across the link and hence the
              link is given as down.

DW QoS Eth:
Link Status   When this bit is set, it indicates that the link is up between
Read-only     the MAC and the TBI, RTBI, or SGMII interface. When this bit is
              reset, it indicates that the link is down between the MAC and
              the TBI, RTBI, or SGMII interface.

I guess that in fact the flag semantics is the same on both devices.
But the Access-status for some reason different. Although DW QoS Eth
databook doesn't define any latched-low CSR. So there is a chance that
some of the databooks might be wrong in the flag access status.

> 
> >  
> > -	/* TODO Make sure that STMMAC_PCS_PAUSE STMMAC_PCS_ASYM_PAUSE usage is legitimate */
> > +	/* TODO The databook says the encoding is defined in IEEE 802.3z,
> > +	 * Section 37.2.1.4. Do we need the STMMAC_PCS_PAUSE and
> > +	 * STMMAC_PCS_ASYM_PAUSE mask here?
> > +	 */
> >  	linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT,
> >  			 state->lp_advertising,
> >  			 FIELD_GET(PCS_ANE_PSE, val) & STMMAC_PCS_PAUSE);
> 

> If it's 802.3z aka 1000base-X format, then yes, we should be using
> these bits if we are getting state from this register.

I meant that should we be using the driver-specific macro in here
seeing the field encoding is defined by the IEEE 802.3z? Is there any
ready-to-use macros/constants defined in the network subsystem core
for the standard Pause encoding (IEEE 802.3z Section 37.2.1.4)?

> 
> If TBI/RTBI is ever used, rather than trying to shoe-horn it all into
> these functions, please consider splitting them into separate PCSes,
> and sharing code between them e.g. using common functions called from
> the method functions or shared method functions where appropriate.

Ok. Sounds reasonable.

I guess your message also means that the patchset re-spinning will be
on me from now, right?) If so, please note, I can't promise I'll be
able to do that soonish. I am quite busy at the moment. I'll be
more-or-less free for that in a month or so.

-Serge(y)

> 
> -- 
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

Re: [PATCH RFC net-next v2 14/17] net: stmmac: Move internal PCS PHYLINK ops to stmmac_pcs.c

[Russell King (Oracle)]

On Wed, Jul 03, 2024 at 10:08:16PM +0300, Serge Semin wrote:
> On Fri, Jun 28, 2024 at 04:07:46PM +0100, Russell King (Oracle) wrote:
> > On Mon, Jun 24, 2024 at 04:26:31PM +0300, Serge Semin wrote:
> > > @@ -621,7 +548,6 @@ int dwmac1000_setup(struct stmmac_priv *priv)
> > >  	mac->mii.clk_csr_shift = 2;
> > >  	mac->mii.clk_csr_mask = GENMASK(5, 2);
> > >  
> > > -	mac->mac_pcs.ops = &dwmac1000_mii_pcs_ops;
> > >  	mac->mac_pcs.neg_mode = true;
> > 
> > "mac->mac_pcs.neg_mode = true;" is a property of the "ops" so should
> > move with it.
> > 
> > > @@ -1475,7 +1396,6 @@ int dwmac4_setup(struct stmmac_priv *priv)
> > >  	mac->mii.clk_csr_mask = GENMASK(11, 8);
> > >  	mac->num_vlan = dwmac4_get_num_vlan(priv->ioaddr);
> > >  
> > > -	mac->mac_pcs.ops = &dwmac4_mii_pcs_ops;
> > >  	mac->mac_pcs.neg_mode = true;
> > 
> > Also applies here.
> > 
> > > diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.c b/drivers/net/ethernet/stmicro/stmmac/hwif.c
> > > index 3666893acb69..c42fb2437948 100644
> > > --- a/drivers/net/ethernet/stmicro/stmmac/hwif.c
> > > +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.c
> > > @@ -363,6 +363,7 @@ int stmmac_hwif_init(struct stmmac_priv *priv)
> > >  		mac->tc = mac->tc ? : entry->tc;
> > >  		mac->mmc = mac->mmc ? : entry->mmc;
> > >  		mac->est = mac->est ? : entry->est;
> > > +		mac->mac_pcs.ops = mac->mac_pcs.ops ?: entry->pcs;
> > 
> 
> > Removing both of the above means that mac->mac_pcs.ops won't ever be set
> > prior to this, so this whole thing should just be:
> > 
> > 		mac->mac_pcs.ops = entry->pcs;
> > 		mac->mac_pcs.neg_mode = true;
> 
> Actually, no. mac->mac_pcs.ops can be set by the platform-specific
> plat_stmmacenet_data::setup() method.

mac->mac_pcs is there for the _internal_ MAC only, not for platforms
to fiddle around with (remember, my patch set adds this!)

I think you're thinking of mac->phylink_pcs which platforms can and
do fiddle with.

> > > +	/* TODO Check the PCS_AN_STATUS.Link status here?.. Note the flag is latched-low */
> > > +
> > > +	/* TODO The next is the TBI/RTBI-specific and seems to be valid if PCS_AN_STATUS.ANC */
> > >  	val = readl(priv->pcsaddr + PCS_ANE_LPA);
> > 
> 
> > I thought these registers only existed of dma_cap.pcs is true ?
> 
> Right. The AN-registers are SGMII/TBI/RTBI-specific.

Therefore, I suggest that if state->interface is RGMII, then these
registers should not be accessed.

My idea is to provide two PCS per MAC:

One simple one which covers RGMII which only reads the PHYIF/RGSMIIIS
register, does no configuration, but does implement the .pcs_enable/
.pcs_disable etc. The .pcs_validate method should also be empty for
this because the AutoNeg ethtool capability does not refer to the
inband signalling, but to the media PHY.

Then a more complex PCS implementation that does everything the RGMII
one does, but also the bits for SGMII (and TBI/RTBI).

> > If we
> > start checking PCS_AN_STATUS.Link here, and this register reads as
> > zeros, doesn't it mean that RMGII inband mode won't ever signal link
> > up?
> 
> Right. The PCS_AN_STATUS.Link should be checked for the SGMII (and
> TBI/RTBI) only. The databooks defines the flag as follows:
> 
> DW GMAC v3.73a:
> Link Status   This bit indicates whether the data channel (link) is up or
> R_SS_SC_LLO   down. For the TBI, RTBI or SGMII interfaces, if ANEG is going
>               on, data cannot be transferred across the link and hence the
>               link is given as down.
> 
> DW QoS Eth:
> Link Status   When this bit is set, it indicates that the link is up between
> Read-only     the MAC and the TBI, RTBI, or SGMII interface. When this bit is
>               reset, it indicates that the link is down between the MAC and
>               the TBI, RTBI, or SGMII interface.
> 
> I guess that in fact the flag semantics is the same on both devices.
> But the Access-status for some reason different. Although DW QoS Eth
> databook doesn't define any latched-low CSR. So there is a chance that
> some of the databooks might be wrong in the flag access status.

Yes, it sounds like it.

> > > -	/* TODO Make sure that STMMAC_PCS_PAUSE STMMAC_PCS_ASYM_PAUSE usage is legitimate */
> > > +	/* TODO The databook says the encoding is defined in IEEE 802.3z,
> > > +	 * Section 37.2.1.4. Do we need the STMMAC_PCS_PAUSE and
> > > +	 * STMMAC_PCS_ASYM_PAUSE mask here?
> > > +	 */
> > >  	linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT,
> > >  			 state->lp_advertising,
> > >  			 FIELD_GET(PCS_ANE_PSE, val) & STMMAC_PCS_PAUSE);
> > 
> 
> > If it's 802.3z aka 1000base-X format, then yes, we should be using
> > these bits if we are getting state from this register.
> 
> I meant that should we be using the driver-specific macro in here
> seeing the field encoding is defined by the IEEE 802.3z? Is there any
> ready-to-use macros/constants defined in the network subsystem core
> for the standard Pause encoding (IEEE 802.3z Section 37.2.1.4)?

include/uapi/linux/mii.h:

#define ADVERTISE_1000XFULL     0x0020  /* Try for 1000BASE-X full-duplex */
	/* GMAC_ANE_FD */
#define ADVERTISE_1000XHALF     0x0040  /* Try for 1000BASE-X half-duplex */
	/* GMAC_ANE_HD */
#define ADVERTISE_1000XPAUSE    0x0080  /* Try for 1000BASE-X pause    */
	/* GMAC_ANE_PSE bit 0 */
#define ADVERTISE_1000XPSE_ASYM 0x0100  /* Try for 1000BASE-X asym pause */
	/* GMAC_ANE_PSE bit 1 */
#define ADVERTISE_LPACK         0x4000  /* Ack link partners response  */
	/* GMAC_ANE_ACK */

#define LPA_1000XFULL           0x0020  /* Can do 1000BASE-X full-duplex */
	/* GMAC_ANE_FD */
#define LPA_1000XHALF           0x0040  /* Can do 1000BASE-X half-duplex */
	/* GMAC_ANE_HD */
#define LPA_1000XPAUSE          0x0080  /* Can do 1000BASE-X pause     */
	/* GMAC_ANE_PSE bit 0 */
#define LPA_1000XPAUSE_ASYM     0x0100  /* Can do 1000BASE-X pause asym*/
	/* GMAC_ANE_PSE bit 1 */
#define LPA_RESV                0x1000  /* Unused...                   */
	/* GMAC_ANE_RFE bit 0 */
#define LPA_RFAULT              0x2000  /* Link partner faulted        */
	/* GMAC_ANE_RFE bit 1 */
#define LPA_LPACK               0x4000  /* Link partner acked us       */
	/* GMAC_ANE_ACK */

> > If TBI/RTBI is ever used, rather than trying to shoe-horn it all into
> > these functions, please consider splitting them into separate PCSes,
> > and sharing code between them e.g. using common functions called from
> > the method functions or shared method functions where appropriate.
> 
> Ok. Sounds reasonable.
> 
> I guess your message also means that the patchset re-spinning will be
> on me from now, right?) If so, please note, I can't promise I'll be
> able to do that soonish. I am quite busy at the moment. I'll be
> more-or-less free for that in a month or so.

Not necessarily - some good news today, the high priority issue I was
working on is lower priority at last, which means I've more time to
look at mainline again. Bad news... I need a break after about 2.5
months of frustrations, which could be from this weekend!

Given the fix for the LNKMOD issue, I suspect that won't be merged
into net-next until after the weekend, but I'll see whether I can
sneak a respin of the patch set once that's happened. That said,
given that we'll be at -rc7, it's likely too late to be thinking
about getting the PCS changes queued up for this coming merge
window. In any case, I don't think even if I did post a series, we're
at the point where we have something that would be ready.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

Re: [PATCH RFC net-next v2 16/17] net: stmmac: Move internal PCS init method to stmmac_pcs.c

[Serge Semin]

On Fri, Jun 28, 2024 at 03:36:20PM +0100, Russell King (Oracle) wrote:
> On Mon, Jun 24, 2024 at 04:26:33PM +0300, Serge Semin wrote:
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> > index 72c2d3e2c121..743d356f6d12 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> > @@ -950,13 +950,16 @@ static struct phylink_pcs *stmmac_mac_select_pcs(struct phylink_config *config,
> >  {
> >  	struct stmmac_priv *priv = netdev_priv(to_net_dev(config->dev));
> >  
> > +	if (priv->hw->pcs)
> > +		return &priv->hw->mac_pcs;
> > +
> >  	if (priv->hw->xpcs)
> >  		return &priv->hw->xpcs->pcs;
> >  
> >  	if (priv->hw->phylink_pcs)
> >  		return priv->hw->phylink_pcs;
> >  
> > -	return stmmac_mac_phylink_select_pcs(priv, interface);
> > +	return NULL;
> 
> I really really don't like this due to:
> 

> 1. I spent a long time working out what the priority here should be, and
> you've just thrown all that work away by changing it - to something that
> I believe is incorrect.
> 

Right, the correct precedence would be to use the external PCS if one
available. It's easy to fix anyway.

> 2. I want to eventually see this function checking the interface type
> before just handing out a random PCS,

The only problem is that currently it relies on the
plat_stmmaenet_data::mac_interface field value instead of parsing the
specified interface type.(

> and it was my intention to
> eventually that into the MACs own select_pcs() methods. Getting rid of
> those methods means that the MACs themselves now can't make the
> decision which is where that should be.

Ok. Why not. We can preserve the MAC-own select_pcs() method.
(See my last comment on this email for details.)

> 
> 3. When operating in RGMII "inband" mode, the .pcs_config etc doesn't
> make much sense (we're probably accessing registers that don't exist)

Absolutely right. Current dwmac_pcs_config() implementation is fully
SGMII/TBI/RTBI-specific.

> and I had plans to split this into a RGMII "PCS" which was just a PCS
> that implemented .pcs_get_state(), a stub .pcs_config(), and a separate
> fully-featured "SGMII PCS".

Actually it's a good idea. We should have that implemented in v3.

> 
> So, I would like to eventually see here something like:
> 
> 	if (priv->hw->xpcs)
> 		return &priv->hw->xpcs->pcs;
> 
> 	if (priv->hw->phylink_pcs)
> 		return priv->hw->phylink_pcs;
> 
> 	if (!(priv->plat->flags & STMMAC_FLAG_HAS_INTEGRATED_PCS)) {
> 		if (phy_interface_mode_is_rgmii(priv->plat->mac_interface))
> 			return &priv->hw->mac_rgmii_pcs;
> 
> 		if (priv->dma_cap.pcs &&
> 		    priv->plat->mac_interface == PHY_INTERFACE_MODE_SGMII)
> 			return &priv->hw->mac_sgmii_pcs;
> 	}
> 
> 	return NULL;

So the differences of my and your implementations are:
1. priv->hw->pcs field is utilized to determine the RGMII/SGMII PCS
availability (it's initialized in dwmac_pcs_init()).
2. The order of the PCS selection: internal PCS has precedence over
the external PCS'es.
3. There is a single PHY-link PCS descriptor for both RGMII "inband"
and SGMII PCSes.

There is nothing hard to settle the 2. and 3. notes. The only
problematic part is 1. due to the damn mac_device_info::ps field
implying the fixed-speed semantics for the MAC2MAC case. The field is
initialized in the stmmac_hw_setup() method based on the
mac_device_info::pcs field content. The mac_device_info::ps value is
then utilized in the stmmac_ops::core_init() methods and in
dwmac_pcs_config() to pre-define the link speed. Since I hadn't come
up with a good idea of what to do with that MAC2MAC stuff back then I
decided to preserve the mac_device_info::pcs-based semantics
everywhere.

But now I guess I've got a good idea. We can use the
plat_stmmacenet_data::mac_port_sel_speed field directly where it is
relevant. Like this:

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c:
static int stmmac_hw_setup(struct net_device *dev, bool ptp_register)
{
	// Drop everything priv->hw.pcs and priv->hw.ps related from here
	// due to the changes suggested further.
}

drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c:
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c:
static void dwmac*_core_init(...)
{
	...
	// Directly use the plat_stmmacenet_data::mac_port_sel_speed value
	switch (priv->plat->mac_port_sel_speed) {
	case SPEED_1000:
		ps_speed = hw->link.speed1000;
		break;
	case SPEED_100:
		ps_speed = hw->link.speed100;
		break;
	case SPEED_10:
		ps_speed = hw->link.speed10;
		break;
	default:
		dev_warn(priv->device, "Unsupported port speed\n");
		break;
	}

	if (ps_speed) {
		value &= hw->link.speed_mask;
		value |= ps_speed | GMAC_CONFIG_TE;
	}
	...
}

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c:
static void dwmac*_core_init(...)
{
	// There is no internal PCS in DW XGMACes. So we can freely drop
	// the hw->ps clause from here.
}

drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c:
static int dwmac_pcs_config(...)
{
	...
	// Directly use the plat_stmmacenet_data::mac_port_sel_speed value
	if (priv->plat->mac_port_sel_speed)
		val |= PCS_AN_CTRL_SGMRAL;
	...
}

After that we can freely drop the mac_device_info::ps and
mac_device_info::pcs fields. Thoughts?

> 
> > +void dwmac_pcs_init(struct mac_device_info *hw)
> > +{
> > +	struct stmmac_priv *priv = hw->priv;
> > +	int interface = priv->plat->mac_interface;
> > +
> > +	if (priv->plat->flags & STMMAC_FLAG_HAS_INTEGRATED_PCS)
> > +		return;
> > +	else if (phy_interface_mode_is_rgmii(interface))
> > +		hw->pcs = STMMAC_PCS_RGMII;
> > +	else if (priv->dma_cap.pcs && interface == PHY_INTERFACE_MODE_SGMII)
> > +		hw->pcs = STMMAC_PCS_SGMII;
> > +
> > +	hw->mac_pcs.neg_mode = true;
> > +}
> 

> Please move "hw->mac_pcs.neg_mode = true;" to where the PCS method
> functions are implemented - it determines whether the PCS method
> functions take the AN mode or the neg mode, and this is a property of
> their implementations. It should not be split away from them.

Ok.

---

Seeing the series introducing the plat_stmmacenet_data::select_pcs()
method has been recently merged in, let's discuss the entire PCS
selection code a bit more. Taking into account what you said above I
guess we can implement something like this:

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c:
static struct phylink_pcs *stmmac_mac_select_pcs(struct phylink_config *config,
                                                 phy_interface_t interface)
{
	// Platform-specific PCS selection method implying DW XPCS and
	// Lynx PCS selection (and internal PCS selection if relevant)
        if (priv->plat->select_pcs) {
                pcs = priv->plat->select_pcs(priv, interface);
                if (!IS_ERR(pcs))
                        return pcs;
        }

	// MAC-specific PCS selection method
	pcs = stmmac_mac_select_int_pcs(priv, priv->hw, priv->plat->mac_interface);
        if (!IS_ERR(pcs))
                return pcs;

        return NULL;
}

drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c:
static struct phylink_pcs *dwmac1000_select_pcs(struct mac_device_info *hw,
						phy_interface_t interface)
{
	if (phy_interface_mode_is_rgmii(interface))
		return &hw->mac_rgmii_pcs;
	else if (priv->dma_cap.pcs && interface == PHY_INTERFACE_MODE_SGMII)
		return &hw->mac_sgmii_pcs;

	return NULLL
}

...

const struct stmmac_ops dwmac1000_ops = {
	...
	.select_pcs = dwmac1000_select_pcs,
	...
};

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c:
// The same changes as in the dwmac1000_core.c file.

drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c:
// Drop my dwmac_pcs_init() implementation if we get to eliminate the 
// mac_device_info::ps and mac_device_info::pcs fields as I suggested
// earlier in this message


So what do you think?

-Serge(y)

> 
> Thanks.
> 
> -- 
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

Re: [PATCH RFC net-next v2 17/17] net: stmmac: pcs: Drop the _SHIFT macros

[Serge Semin]

On Fri, Jun 28, 2024 at 03:42:41PM +0100, Russell King (Oracle) wrote:
> On Mon, Jun 24, 2024 at 04:26:34PM +0300, Serge Semin wrote:
> > The PCS_ANE_PSE_SHIFT and PCS_ANE_RFE_SHIFT are unused anyway. Moreover
> > PCS_ANE_PSE and PCS_ANE_RFE are the respective field masks. So the
> > FIELD_GET()/FIELD_SET() macro-functions can be used to get/set the fields
> > content. Drop the _SHIFT macros for good then.
> > 
> > Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
> > ---
> >  drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h | 2 --
> >  1 file changed, 2 deletions(-)
> > 
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> > index a17e5b37c411..0f15c9898788 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h
> > @@ -43,9 +43,7 @@
> >  #define PCS_ANE_FD		BIT(5)		/* AN Full-duplex flag */
> >  #define PCS_ANE_HD		BIT(6)		/* AN Half-duplex flag */
> >  #define PCS_ANE_PSE		GENMASK(8, 7)	/* AN Pause Encoding */
> > -#define PCS_ANE_PSE_SHIFT	7
> >  #define PCS_ANE_RFE		GENMASK(13, 12)	/* AN Remote Fault Encoding */
> > -#define PCS_ANE_RFE_SHIFT	12
> >  #define PCS_ANE_ACK		BIT(14)		/* AN Base-page acknowledge */
> 

> I would actually like to see all these go away.
> 
> PCS_ANE_FD == LPA_1000XFULL
> PCS_ANE_HD == LPA_1000XHALF
> PCS_ANE_PSE == LPA_1000XPAUSE and LPA_1000XPAUSE_ASYM
> PCS_ANE_RFE == LPA_RESV and LPA_RFAULT
> PCS_ANE_ACK == LPA_LPACK

Great! It will be even better.

> 
> Isn't it rather weird that the field layout matches 802.3z aka
> 1000base-X and not SGMII? This layout would not make sense for Cisco
> SGMII as it loses the speed information conveyed by the Cisco SGMII
> control word.
> 
> This isn't a case of the manufacturer using "SGMII" to mean a serial
> gigabit media independent interface that supports 1000base-X
> (PHY_INTERFACE_MODE_1000BASEX) rather than Cisco SGMII
> (PHY_INTERFACE_MODE_SGMII) ?

It's not that weird. The only CSRs available and functional for SGMII
PCS are PCS_AN_CTRL and PCS_AN_STATUS (plus PCS_SRGMII_CSR where the
PCS exposes the link status, aka Cisco SGMII tx_config_reg[15:0] with
the vendor-specific layout). Registers from PCS_ANE_ADV up to PCS_TBI_EXT
exist for TBI and RTBI PCS only. Since TBI is defined in the IEEE
802.3z C36 I guess that's why the layout matches to what is described
in IEEE 802.3z C37.

-Serge(y)

> 
> -- 
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!

Re: [PATCH RFC net-next v2 14/17] net: stmmac: Move internal PCS PHYLINK ops to stmmac_pcs.c

[Serge Semin]

On Wed, Jul 03, 2024 at 09:07:22PM +0100, Russell King (Oracle) wrote:
> On Wed, Jul 03, 2024 at 10:08:16PM +0300, Serge Semin wrote:
> > On Fri, Jun 28, 2024 at 04:07:46PM +0100, Russell King (Oracle) wrote:
> > > On Mon, Jun 24, 2024 at 04:26:31PM +0300, Serge Semin wrote:
> > > > @@ -621,7 +548,6 @@ int dwmac1000_setup(struct stmmac_priv *priv)
> > > >  	mac->mii.clk_csr_shift = 2;
> > > >  	mac->mii.clk_csr_mask = GENMASK(5, 2);
> > > >  
> > > > -	mac->mac_pcs.ops = &dwmac1000_mii_pcs_ops;
> > > >  	mac->mac_pcs.neg_mode = true;
> > > 
> > > "mac->mac_pcs.neg_mode = true;" is a property of the "ops" so should
> > > move with it.
> > > 
> > > > @@ -1475,7 +1396,6 @@ int dwmac4_setup(struct stmmac_priv *priv)
> > > >  	mac->mii.clk_csr_mask = GENMASK(11, 8);
> > > >  	mac->num_vlan = dwmac4_get_num_vlan(priv->ioaddr);
> > > >  
> > > > -	mac->mac_pcs.ops = &dwmac4_mii_pcs_ops;
> > > >  	mac->mac_pcs.neg_mode = true;
> > > 
> > > Also applies here.
> > > 
> > > > diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.c b/drivers/net/ethernet/stmicro/stmmac/hwif.c
> > > > index 3666893acb69..c42fb2437948 100644
> > > > --- a/drivers/net/ethernet/stmicro/stmmac/hwif.c
> > > > +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.c
> > > > @@ -363,6 +363,7 @@ int stmmac_hwif_init(struct stmmac_priv *priv)
> > > >  		mac->tc = mac->tc ? : entry->tc;
> > > >  		mac->mmc = mac->mmc ? : entry->mmc;
> > > >  		mac->est = mac->est ? : entry->est;
> > > > +		mac->mac_pcs.ops = mac->mac_pcs.ops ?: entry->pcs;
> > > 
> > 
> > > Removing both of the above means that mac->mac_pcs.ops won't ever be set
> > > prior to this, so this whole thing should just be:
> > > 
> > > 		mac->mac_pcs.ops = entry->pcs;
> > > 		mac->mac_pcs.neg_mode = true;
> > 
> > Actually, no. mac->mac_pcs.ops can be set by the platform-specific
> > plat_stmmacenet_data::setup() method.
> 
> mac->mac_pcs is there for the _internal_ MAC only, not for platforms
> to fiddle around with (remember, my patch set adds this!)
> 
> I think you're thinking of mac->phylink_pcs which platforms can and
> do fiddle with.

Actually I did mean mac->mac_pcs.ops. AFAICS the stmmac_hwif_init()
method semantics implies that the plat_stmmacenet_data::setup()
function responsibility is to allocate the mac_device_info instance
and pre-initialize it' fields with the data specific for the
particular device including the DW MAC HW-interface ops. Like it's
done in the dwmac-sun8i.c driver (and in the currently being reviewed
Loongson GMAC/GNET series). So I suppose it should also concern the
internal PCS ops implementation being added by you. In case if some
particular controller has some internal PCS peculiarities required to
be fixed on the PHY-link PCS ops implementation level. No?

> 
> > > > +	/* TODO Check the PCS_AN_STATUS.Link status here?.. Note the flag is latched-low */
> > > > +
> > > > +	/* TODO The next is the TBI/RTBI-specific and seems to be valid if PCS_AN_STATUS.ANC */
> > > >  	val = readl(priv->pcsaddr + PCS_ANE_LPA);
> > > 
> > 
> > > I thought these registers only existed of dma_cap.pcs is true ?
> > 
> > Right. The AN-registers are SGMII/TBI/RTBI-specific.
> 

> Therefore, I suggest that if state->interface is RGMII, then these
> registers should not be accessed.

Fully agree.

> 
> My idea is to provide two PCS per MAC:
> 
> One simple one which covers RGMII which only reads the PHYIF/RGSMIIIS
> register, does no configuration, but does implement the .pcs_enable/
> .pcs_disable etc. The .pcs_validate method should also be empty for
> this because the AutoNeg ethtool capability does not refer to the
> inband signalling, but to the media PHY.
> 
> Then a more complex PCS implementation that does everything the RGMII
> one does, but also the bits for SGMII (and TBI/RTBI).

Agreed. Good idea.

> 
> > > If we
> > > start checking PCS_AN_STATUS.Link here, and this register reads as
> > > zeros, doesn't it mean that RMGII inband mode won't ever signal link
> > > up?
> > 
> > Right. The PCS_AN_STATUS.Link should be checked for the SGMII (and
> > TBI/RTBI) only. The databooks defines the flag as follows:
> > 
> > DW GMAC v3.73a:
> > Link Status   This bit indicates whether the data channel (link) is up or
> > R_SS_SC_LLO   down. For the TBI, RTBI or SGMII interfaces, if ANEG is going
> >               on, data cannot be transferred across the link and hence the
> >               link is given as down.
> > 
> > DW QoS Eth:
> > Link Status   When this bit is set, it indicates that the link is up between
> > Read-only     the MAC and the TBI, RTBI, or SGMII interface. When this bit is
> >               reset, it indicates that the link is down between the MAC and
> >               the TBI, RTBI, or SGMII interface.
> > 
> > I guess that in fact the flag semantics is the same on both devices.
> > But the Access-status for some reason different. Although DW QoS Eth
> > databook doesn't define any latched-low CSR. So there is a chance that
> > some of the databooks might be wrong in the flag access status.
> 
> Yes, it sounds like it.
> 
> > > > -	/* TODO Make sure that STMMAC_PCS_PAUSE STMMAC_PCS_ASYM_PAUSE usage is legitimate */
> > > > +	/* TODO The databook says the encoding is defined in IEEE 802.3z,
> > > > +	 * Section 37.2.1.4. Do we need the STMMAC_PCS_PAUSE and
> > > > +	 * STMMAC_PCS_ASYM_PAUSE mask here?
> > > > +	 */
> > > >  	linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT,
> > > >  			 state->lp_advertising,
> > > >  			 FIELD_GET(PCS_ANE_PSE, val) & STMMAC_PCS_PAUSE);
> > > 
> > 
> > > If it's 802.3z aka 1000base-X format, then yes, we should be using
> > > these bits if we are getting state from this register.
> > 
> > I meant that should we be using the driver-specific macro in here
> > seeing the field encoding is defined by the IEEE 802.3z? Is there any
> > ready-to-use macros/constants defined in the network subsystem core
> > for the standard Pause encoding (IEEE 802.3z Section 37.2.1.4)?
> 
> include/uapi/linux/mii.h:
> 
> #define ADVERTISE_1000XFULL     0x0020  /* Try for 1000BASE-X full-duplex */
> 	/* GMAC_ANE_FD */
> #define ADVERTISE_1000XHALF     0x0040  /* Try for 1000BASE-X half-duplex */
> 	/* GMAC_ANE_HD */
> #define ADVERTISE_1000XPAUSE    0x0080  /* Try for 1000BASE-X pause    */
> 	/* GMAC_ANE_PSE bit 0 */
> #define ADVERTISE_1000XPSE_ASYM 0x0100  /* Try for 1000BASE-X asym pause */
> 	/* GMAC_ANE_PSE bit 1 */
> #define ADVERTISE_LPACK         0x4000  /* Ack link partners response  */
> 	/* GMAC_ANE_ACK */
> 
> #define LPA_1000XFULL           0x0020  /* Can do 1000BASE-X full-duplex */
> 	/* GMAC_ANE_FD */
> #define LPA_1000XHALF           0x0040  /* Can do 1000BASE-X half-duplex */
> 	/* GMAC_ANE_HD */
> #define LPA_1000XPAUSE          0x0080  /* Can do 1000BASE-X pause     */
> 	/* GMAC_ANE_PSE bit 0 */
> #define LPA_1000XPAUSE_ASYM     0x0100  /* Can do 1000BASE-X pause asym*/
> 	/* GMAC_ANE_PSE bit 1 */
> #define LPA_RESV                0x1000  /* Unused...                   */
> 	/* GMAC_ANE_RFE bit 0 */
> #define LPA_RFAULT              0x2000  /* Link partner faulted        */
> 	/* GMAC_ANE_RFE bit 1 */
> #define LPA_LPACK               0x4000  /* Link partner acked us       */
> 	/* GMAC_ANE_ACK */

Got it. Thanks.

> 
> > > If TBI/RTBI is ever used, rather than trying to shoe-horn it all into
> > > these functions, please consider splitting them into separate PCSes,
> > > and sharing code between them e.g. using common functions called from
> > > the method functions or shared method functions where appropriate.
> > 
> > Ok. Sounds reasonable.
> > 
> > I guess your message also means that the patchset re-spinning will be
> > on me from now, right?) If so, please note, I can't promise I'll be
> > able to do that soonish. I am quite busy at the moment. I'll be
> > more-or-less free for that in a month or so.
> 
> Not necessarily - some good news today, the high priority issue I was
> working on is lower priority at last, which means I've more time to
> look at mainline again. Bad news... I need a break after about 2.5
> months of frustrations, which could be from this weekend!
> 
> Given the fix for the LNKMOD issue, I suspect that won't be merged
> into net-next until after the weekend, but I'll see whether I can
> sneak a respin of the patch set once that's happened. That said,
> given that we'll be at -rc7, it's likely too late to be thinking
> about getting the PCS changes queued up for this coming merge
> window. In any case, I don't think even if I did post a series, we're
> at the point where we have something that would be ready.

Ok. Let me know what is going to be my part in the next patch set
revision preparation and when my help is needed. I think I'll be able
to allocate some evenings and a few weekend days for that in this
month. I very much hope my work schedule will be less occupied in the
next month.

-Serge(y)

> 
> -- 
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!