From: Nicolin Chen <nicolinc@nvidia.com>
To: Will Deacon <will@kernel.org>
Cc: <robin.murphy@arm.com>, <joro@8bytes.org>, <jgg@nvidia.com>,
<thierry.reding@gmail.com>, <vdumpa@nvidia.com>,
<jonathanh@nvidia.com>, <linux-kernel@vger.kernel.org>,
<iommu@lists.linux.dev>, <linux-arm-kernel@lists.infradead.org>,
<linux-tegra@vger.kernel.org>
Subject: Re: [PATCH v9 4/6] iommu/arm-smmu-v3: Add CS_NONE quirk for CONFIG_TEGRA241_CMDQV
Date: Mon, 8 Jul 2024 10:59:54 -0700 [thread overview]
Message-ID: <ZowpGi/q7MeS5iYO@Asurada-Nvidia> (raw)
In-Reply-To: <20240708112928.GB11567@willie-the-truck>
On Mon, Jul 08, 2024 at 12:29:28PM +0100, Will Deacon wrote:
> > With that, we cannot avoid an unconditional hard-coding tegra
> > function call even if we switch to an impl design:
> >
> > +static int acpi_smmu_impl_init(u32 model, struct arm_smmu_device *smmu)
> > +{
> > + /*
> > + * unconditional go through ACPI table to detect if there is a tegra241
> > + * implementation that extends SMMU with a CMDQV. The probe() will fill
> > + * the smmu->impl pointer upon success. Otherwise, fall back to regular
> > + * SMMU CMDQ.
> > + */
> > + tegra241_impl_acpi_probe(smmu);
>
> In-line the minimal DSDT parsing to figure out if we're on a Tegra part.
> If it's that bad, put it in a static inline in arm-smmu-v3.h.
OK. How about the following?
/* arm-smmu-v3.h */
static inline void arm_smmu_impl_acpi_dsdt_probe(struct arm_smmu_device *smmu,
struct acpi_iort_node *node)
{
tegra241_cmdqv_acpi_dsdt_probe(smmu, node);
}
/* arm-smmu-v3.c */
static int arm_smmu_impl_acpi_probe(struct arm_smmu_device *smmu,
struct acpi_iort_node *node)
{
/*
* DSDT might holds some SMMU extension, so we have no option but to go
* through ACPI tables unconditionally. This probe function should fill
* the smmu->impl pointer upon success. Otherwise, just carry on with a
* standard SMMU.
*/
arm_smmu_impl_acpi_dsdt_probe(smmu, node);
return 0;
}
> > + return 0;
> > +}
> >
> > As for arm_smmu_cmdq_needs_busy_polling, it doesn't really look
> > very optimal to me.
>
> "optimal" in what sense? In that you don't like how it smells, or that
> it's measurably bad?
It would potentially not work if someday an implementation has
two secondary queues? I got your point of making it an option
just like the existing ARM_SMMU_OPT_MSIPOLL though..
Thanks
Nicolin
next prev parent reply other threads:[~2024-07-08 18:00 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-12 21:45 [PATCH v9 0/6] Add Tegra241 (Grace) CMDQV Support (part 1/2) Nicolin Chen
2024-06-12 21:45 ` [PATCH v9 1/6] iommu/arm-smmu-v3: Make symbols public for CONFIG_TEGRA241_CMDQV Nicolin Chen
2024-06-12 21:45 ` [PATCH v9 2/6] iommu/arm-smmu-v3: Issue a batch of commands to the same cmdq Nicolin Chen
2024-06-12 21:45 ` [PATCH v9 3/6] iommu/arm-smmu-v3: Enforce arm_smmu_cmdq_build_sync_cmd Nicolin Chen
2024-06-12 21:45 ` [PATCH v9 4/6] iommu/arm-smmu-v3: Add CS_NONE quirk for CONFIG_TEGRA241_CMDQV Nicolin Chen
2024-07-02 17:43 ` Will Deacon
2024-07-02 18:19 ` Nicolin Chen
2024-07-02 18:49 ` Will Deacon
2024-07-02 19:47 ` Nicolin Chen
2024-07-02 20:10 ` Nicolin Chen
2024-07-05 15:27 ` Will Deacon
2024-07-05 18:10 ` Nicolin Chen
2024-07-06 0:32 ` Nicolin Chen
2024-07-08 11:31 ` Will Deacon
2024-07-08 18:02 ` Nicolin Chen
2024-07-08 11:29 ` Will Deacon
2024-07-08 11:43 ` Will Deacon
2024-07-08 18:05 ` Nicolin Chen
2024-07-08 17:59 ` Nicolin Chen [this message]
2024-07-09 18:29 ` Nicolin Chen
2024-06-12 21:45 ` [PATCH v9 5/6] iommu/arm-smmu-v3: Add in-kernel support for NVIDIA Tegra241 (Grace) CMDQV Nicolin Chen
2024-07-02 17:41 ` Will Deacon
2024-07-02 19:23 ` Nicolin Chen
2024-06-12 21:45 ` [PATCH v9 6/6] iommu/tegra241-cmdqv: Limit CMDs for guest owned VINTF Nicolin Chen
2024-06-28 19:26 ` [PATCH v9 0/6] Add Tegra241 (Grace) CMDQV Support (part 1/2) Pavel Machek
2024-06-28 21:29 ` Nicolin Chen
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