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R. Silva" , Erick Archer , Joel Granados , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH v4 3/7] RISC-V: Check scalar unaligned access on all CPUs Message-ID: References: <20240711215846.834365-1-jesse@rivosinc.com> <20240711215846.834365-4-jesse@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240711215846.834365-4-jesse@rivosinc.com> On Thu, Jul 11, 2024 at 05:58:42PM -0400, Jesse Taube wrote: > Originally, the check_unaligned_access_emulated_all_cpus function > only checked the boot hart. This fixes the function to check all > harts. > > Fixes: 71c54b3d169d ("riscv: report misaligned accesses emulation to hwprobe") > Signed-off-by: Jesse Taube > Cc: stable@vger.kernel.org > --- > V1 -> V2: > - New patch > V2 -> V3: > - Split patch > V3 -> V4: > - Re-add check for a system where a heterogeneous > CPU is hotplugged into a previously homogenous > system. > --- > arch/riscv/kernel/traps_misaligned.c | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c > index b62d5a2f4541..1a1bb41472ea 100644 > --- a/arch/riscv/kernel/traps_misaligned.c > +++ b/arch/riscv/kernel/traps_misaligned.c > @@ -526,11 +526,11 @@ int handle_misaligned_store(struct pt_regs *regs) > return 0; > } > > -static bool check_unaligned_access_emulated(int cpu) > +static void check_unaligned_access_emulated(struct work_struct *unused) Small change, can you give this a different name like "work" and instead give it the attribute "__always_unused" like: struct work_struct *work __always_unused Otherwise, Reviewed-by: Charlie Jenkins > { > + int cpu = smp_processor_id(); > long *mas_ptr = per_cpu_ptr(&misaligned_access_speed, cpu); > unsigned long tmp_var, tmp_val; > - bool misaligned_emu_detected; > > *mas_ptr = RISCV_HWPROBE_MISALIGNED_UNKNOWN; > > @@ -538,19 +538,16 @@ static bool check_unaligned_access_emulated(int cpu) > " "REG_L" %[tmp], 1(%[ptr])\n" > : [tmp] "=r" (tmp_val) : [ptr] "r" (&tmp_var) : "memory"); > > - misaligned_emu_detected = (*mas_ptr == RISCV_HWPROBE_MISALIGNED_EMULATED); > /* > * If unaligned_ctl is already set, this means that we detected that all > * CPUS uses emulated misaligned access at boot time. If that changed > * when hotplugging the new cpu, this is something we don't handle. > */ > - if (unlikely(unaligned_ctl && !misaligned_emu_detected)) { > + if (unlikely(unaligned_ctl && (*mas_ptr != RISCV_HWPROBE_MISALIGNED_EMULATED))) { > pr_crit("CPU misaligned accesses non homogeneous (expected all emulated)\n"); > while (true) > cpu_relax(); > } > - > - return misaligned_emu_detected; > } > > bool check_unaligned_access_emulated_all_cpus(void) > @@ -562,8 +559,11 @@ bool check_unaligned_access_emulated_all_cpus(void) > * accesses emulated since tasks requesting such control can run on any > * CPU. > */ > + schedule_on_each_cpu(check_unaligned_access_emulated); > + > for_each_online_cpu(cpu) > - if (!check_unaligned_access_emulated(cpu)) > + if (per_cpu(misaligned_access_speed, cpu) > + != RISCV_HWPROBE_MISALIGNED_EMULATED) > return false; > > unaligned_ctl = true; > -- > 2.45.2 >