From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 533D51755C; Sat, 3 Aug 2024 23:38:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722728317; cv=none; b=aDFEyByJG8aNw5sTZpkpdhGQanxfAH4qQO0XzUusp3seVxkTExAt2XQE/qFRqGibTk4DsddRgSfFOxYl67N1/iCU00HHz8jYdT+0bvKnVD5W0r1qF0lYroQknIBh6TrGw1FqytuZ3y96IYQrxm8ZOEVNsMazzwTyfzWfAupM18E= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722728317; c=relaxed/simple; bh=DKdJ8ZmPQiV1AKw6W1zusg/7WPyZQpoiTNot2qWt4ik=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=dPY2+gafvFGFBol5ygpnYdKOxClXpjVB+XsbBobKOpmvk7WYkBxUKPI4x69mZUgYSHvu9wqekI+99+ps2wfExmbgc+XZlKlA8U/afmxTYFIeX5tiJOYgnHp459XXvq3miQGM6a9KE17apY5z9WmnDnYxsZoPbipGz9ykNys8sZk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.98) (envelope-from ) id 1saOKJ-0000000082J-1Qgu; Sat, 03 Aug 2024 23:38:19 +0000 Date: Sun, 4 Aug 2024 00:38:11 +0100 From: Daniel Golle To: Huang-Huang Bao Cc: Heiko Stuebner , Linus Walleij , Richard Kojedzinszky , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH] pinctrl: rockchip: correct RK3328 iomux width flag for GPIO2-B pins Message-ID: References: <20240709105428.1176375-1-i@eh5.me> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240709105428.1176375-1-i@eh5.me> On Tue, Jul 09, 2024 at 06:54:28PM +0800, Huang-Huang Bao wrote: > The base iomux offsets for each GPIO pin line are accumulatively > calculated based off iomux width flag in rockchip_pinctrl_get_soc_data. > If the iomux width flag is one of IOMUX_WIDTH_4BIT, IOMUX_WIDTH_3BIT or > IOMUX_WIDTH_2BIT, the base offset for next pin line would increase by 8 > bytes, otherwise it would increase by 4 bytes. > > Despite most of GPIO2-B iomux have 2-bit data width, which can be fit > into 4 bytes space with write mask, it actually take 8 bytes width for > whole GPIO2-B line. > > Commit e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328 > GPIO2-B pins") wrongly set iomux width flag to 0, causing all base > iomux offset for line after GPIO2-B to be calculated wrong. Fix the > iomux width flag to IOMUX_WIDTH_2BIT so the offset after GPIO2-B is > correctly increased by 8, matching the actual width of GPIO2-B iomux. > > Fixes: e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins") > Cc: stable@vger.kernel.org > Reported-by: Richard Kojedzinszky > Closes: https://lore.kernel.org/linux-rockchip/4f29b743202397d60edfb3c725537415@kojedz.in/ > Tested-by: Richard Kojedzinszky > Signed-off-by: Huang-Huang Bao Indeed fixes issues on RK3328 which appeared with the backport of commit in Fixes:-tag to linux-stable. Thank you for taking care of that. Tested-by: Daniel Golle > --- > > I have double checked the iomux offsets in debug message match iomux > register definitions in "GRF Register Description" section in RK3328 > TRM[1]. > > [1]: https://opensource.rock-chips.com/images/9/97/Rockchip_RK3328TRM_V1.1-Part1-20170321.pdf > > Kernel pinctrl debug message with dyndbg="file pinctrl-rockchip.c +p": > rockchip-pinctrl pinctrl: bank 0, iomux 0 has iom_offset 0x0 drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 0, iomux 1 has iom_offset 0x4 drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 0, iomux 2 has iom_offset 0x8 drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 0, iomux 3 has iom_offset 0xc drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 1, iomux 0 has iom_offset 0x10 drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 1, iomux 1 has iom_offset 0x14 drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 1, iomux 2 has iom_offset 0x18 drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 1, iomux 3 has iom_offset 0x1c drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 2, iomux 0 has iom_offset 0x20 drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 2, iomux 1 has iom_offset 0x24 drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 2, iomux 2 has iom_offset 0x2c drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 2, iomux 3 has iom_offset 0x34 drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 3, iomux 0 has iom_offset 0x38 drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 3, iomux 1 has iom_offset 0x40 drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 3, iomux 2 has iom_offset 0x48 drv_offset 0x0 > rockchip-pinctrl pinctrl: bank 3, iomux 3 has iom_offset 0x4c drv_offset 0x0 > > The "Closes" links to test report from original reporter with original > issue contained, which was not delivered to any mailing list thus not > available on the web. > > Added CC stable as the problematic e8448a6c817c fixed by this patch was > recently merged to stable kernels. > > Sorry for the inconvenience caused, > Huang-Huang > > drivers/pinctrl/pinctrl-rockchip.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > > base-commit: 4376e966ecb78c520b0faf239d118ecfab42a119 > -- > 2.45.2 > > diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c > index 3f56991f5b89..f6da91941fbd 100644 > --- a/drivers/pinctrl/pinctrl-rockchip.c > +++ b/drivers/pinctrl/pinctrl-rockchip.c > @@ -3813,7 +3813,7 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = { > PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", 0, 0, 0, 0), > PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0), > PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, > - 0, > + IOMUX_WIDTH_2BIT, > IOMUX_WIDTH_3BIT, > 0), > PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3",