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X-CSE-ConnectionGUID: MWZEFqH2SXi9JeIQ1PKMdw== X-CSE-MsgGUID: jTZNG0kcTHqf3M+xQ/BAzw== X-IronPort-AV: E=McAfee;i="6700,10204,11162"; a="32819302" X-IronPort-AV: E=Sophos;i="6.09,285,1716274800"; d="scan'208";a="32819302" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2024 23:30:30 -0700 X-CSE-ConnectionGUID: OK0xb/X4QSK98fK2qnVG0A== X-CSE-MsgGUID: yIz5n0FASNiiwTlY+NexCg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,285,1716274800"; d="scan'208";a="58632017" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa010.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2024 23:30:25 -0700 Date: Tue, 13 Aug 2024 09:30:22 +0300 From: Raag Jadav To: Andi Shyti Cc: jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, tursulin@ursulin.net, airlied@gmail.com, daniel@ffwll.ch, linux@roeck-us.net, andriy.shevchenko@linux.intel.com, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, anshuman.gupta@intel.com, badal.nilawar@intel.com, riana.tauro@intel.com, ashutosh.dixit@intel.com, karthik.poosa@intel.com Subject: Re: [PATCH v5] drm/i915/hwmon: expose fan speed Message-ID: References: <20240812081538.1457396-1-raag.jadav@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Mon, Aug 12, 2024 at 03:50:47PM +0200, Andi Shyti wrote: > Hi Raag, > > > +static int > > +hwm_fan_read(struct hwm_drvdata *ddat, u32 attr, long *val) > > +{ > > + struct i915_hwmon *hwmon = ddat->hwmon; > > + struct hwm_fan_info *fi = &ddat->fi; > > + u64 rotations, time_now, time; > > + intel_wakeref_t wakeref; > > + u32 reg_val, pulses; > > + int ret = 0; > > + > > + if (attr != hwmon_fan_input) > > + return -EOPNOTSUPP; > > + > > + wakeref = intel_runtime_pm_get(ddat->uncore->rpm); > > + mutex_lock(&hwmon->hwmon_lock); > > + > > + reg_val = intel_uncore_read(ddat->uncore, hwmon->rg.fan_speed); > > + time_now = get_jiffies_64(); > > + > > + /* Handle HW register overflow */ > > + if (reg_val >= fi->reg_val_prev) > > + pulses = reg_val - fi->reg_val_prev; > > + else > > + pulses = UINT_MAX - fi->reg_val_prev + reg_val; > > + > > + /* > > + * HW register value is accumulated count of pulses from > > + * PWM fan with the scale of 2 pulses per rotation. > > + */ > > + rotations = pulses / 2; > > + > > + time = jiffies_delta_to_msecs(time_now - fi->time_prev); > > + if (unlikely(!time)) { > > + ret = -EAGAIN; > > + goto exit; > > + } > > Can you please add a comment describing how you obtain the speed > calculation? That's what I initially tried but ended up dropping it in favour of RPM formula below, which I found to be doing a better job of explaining than a few lines of description. > Basically at every read you store the values. Is it possible that > we don't have reads for a long time and the register resets more > than once? Considering a fan continuously running at higher speeds (for example 4000 RPM which is quite optimistic), with the scale of 2 pulses per rotation, a 32 bit register will take around a year to overflow, which is more than most usecases I could think of. Raag > > + /* > > + * Convert to minutes for calculating RPM. > > + * RPM = number of rotations * msecs per minute / time in msecs > > + */ > > + *val = DIV_ROUND_UP(rotations * (MSEC_PER_SEC * 60), time); > > + > > + fi->reg_val_prev = reg_val; > > + fi->time_prev = time_now; > > +exit: > > + mutex_unlock(&hwmon->hwmon_lock); > > + intel_runtime_pm_put(ddat->uncore->rpm, wakeref); > > + return ret; > > +}