Re: [PATCH v2 2/7] i2c: npcm: correct the read/write operation procedure

Andi Shyti
2024-09-05T21:29:31Z

Hi Tyronne,

On Fri, Aug 30, 2024 at 11:46:35AM GMT, Tyrone Ting wrote:
> Originally the driver uses the XMIT bit in SMBnST register to decide
> the upcoming i2c transaction. If XMIT bit is 1, then it will be an i2c
> write operation. If it's 0, then a read operation will be executed.
>
> After checking the datasheet, the XMIT bit is valid when the i2c module
> is acting in a slave role. Use the software status to control the i2c
> transaction flow instead when the i2c module is acting in a master role.
>
> Fixes: 48acf8292280 ("i2c: Remove redundant comparison in npcm_i2c_reg_slave")

Fixes needs to be used if you are fixing a bug (crash,
device malfunction, etc.). If you want to use it, please describe
the bug you are fixing. Otherwise, please, remove it.

> Signed-off-by: Tyrone Ting <kfting@nuvoton.com>
> ---
> drivers/i2c/busses/i2c-npcm7xx.c | 7 ++-----
> 1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-npcm7xx.c b/drivers/i2c/busses/i2c-npcm7xx.c
> index bbcb4d6668ce..2b76dbfba438 100644
> --- a/drivers/i2c/busses/i2c-npcm7xx.c
> +++ b/drivers/i2c/busses/i2c-npcm7xx.c
> @@ -1628,13 +1628,10 @@ static void npcm_i2c_irq_handle_sda(struct npcm_i2c *bus, u8 i2cst)
> npcm_i2c_wr_byte(bus, bus->dest_addr | BIT(0));
> /* SDA interrupt, after start\restart */
> } else {
> - if (NPCM_I2CST_XMIT & i2cst) {
> - bus->operation = I2C_WRITE_OPER;
> + if (bus->operation == I2C_WRITE_OPER)
> npcm_i2c_irq_master_handler_write(bus);
> - } else {
> - bus->operation = I2C_READ_OPER;
> + else if (bus->operation == I2C_READ_OPER)
> npcm_i2c_irq_master_handler_read(bus);

mmmhhh... you are changing the logic here and you are not
describing the logic change in the commit log.

Without looking at the details, if this is a state machine you
are breaking it.

Can anyone from the ARM/NUVOTON NPCM supporters and reviewers
take a look at this patch?

Thanks,
Andi

> - }
> }
> }
>
> --
> 2.34.1
>