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AJvYcCUrNKTGRyHErkm1KKc8ddR00AOvxaRKaGRPIc7ThwQGSILl2sStVBqChgCPGXIHv5UvCe+PD5qE8H7KQZw=@vger.kernel.org X-Gm-Message-State: AOJu0Yx+4V+9wMLDH6VCaZLWz7ooKTZaJlmWRDq8ksf3wz4cUi7ffSju yiiw0lcyG61drlVaQTNLXa8AwnHkm5VxIMCteA08rsNRr1XNkIz1TeOBPw1qNnM3QTB+lG74qJe d1A== X-Google-Smtp-Source: AGHT+IEyaU7HwD8P1kj9fZKH///TZKTxYleYQe9/4U+rzcNrsW+wdQjOiMgd4p7gsiXUIRaKzhvpQ4gUL4g= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:690c:2c11:b0:690:8ad7:55f9 with SMTP id 00721157ae682-6db44d6c217mr1835277b3.2.1725987984610; Tue, 10 Sep 2024 10:06:24 -0700 (PDT) Date: Tue, 10 Sep 2024 10:06:23 -0700 In-Reply-To: <1cd7516391a4c51890c5b0c60a6f149b00cae3af.camel@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240626073719.5246-1-amit@kernel.org> <52d965101127167388565ed1520e1f06d8492d3b.camel@kernel.org> <1cd7516391a4c51890c5b0c60a6f149b00cae3af.camel@kernel.org> Message-ID: Subject: Re: [PATCH v2] KVM: SVM: let alternatives handle the cases when RSB filling is required From: Sean Christopherson To: Amit Shah Cc: David Kaplan , Jim Mattson , "pbonzini@redhat.com" , "x86@kernel.org" , "kvm@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "dave.hansen@linux.intel.com" , "hpa@zytor.com" , Kim Phillips Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Mon, Jul 22, 2024, Amit Shah wrote: > On Tue, 2024-07-16 at 12:10 -0700, Sean Christopherson wrote: > > FWIW, I feel the same way about all the other post-VM-Exit mitigations, > > they just don't stand out in the same way because the entire mitigation > > sequence is absent on one vendor the other, i.e. they don't look wrong = at > > first glance.=C2=A0 But if KVM could have a mostly unified VM-Enter =3D= > VM-Exit > > assembly code, I would happliy eat a dead NOP/JMP or three.=C2=A0 Now t= hat I > > look at it, that actually seems very doable... >=20 > Sure. I think some of the fallacy there is also to treat VMX and SVM > as similar (while not treating the Arm side as similar). Bringing ARM into the picture is little more than whataboutism. KVM x86 an= d KVM arm64 _can't_ share assembly. They _can't_ share things like MSR intercept= ion tracking because MSRs are 100% an x86-only concept. The fact that sharing = code across x86 and ARM is challenging doesn't have any bearing on whether or no= t VMX and SVM can/should share code. > They are different implementations, with several overlapping details - bu= t > it's perilous to think everything maps the same across vendors. I never said everything maps the same. The point I am trying to make is th= at there is significant value _for KVM_ in having common code between architec= tures, and between vendors within an architecture. I can provide numerous example= s where something was implemented/fixed in vendor/arch code, and then later i= t was discovered that the feature/fix was also wanted/needed in other vendor/arch= code.