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From: Sean Christopherson <seanjc@google.com>
To: Adrian Hunter <adrian.hunter@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Paolo Bonzini <pbonzini@redhat.com>,
	 Ingo Molnar <mingo@redhat.com>,
	Mark Rutland <mark.rutland@arm.com>,
	 Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Heiko Carstens <hca@linux.ibm.com>,
	 Thomas Richter <tmricht@linux.ibm.com>,
	Hendrik Brueckner <brueckner@linux.ibm.com>,
	 Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@linaro.org>,
	 James Clark <james.clark@arm.com>,
	coresight@lists.linaro.org,
	 linux-arm-kernel@lists.infradead.org,
	Yicong Yang <yangyicong@hisilicon.com>,
	 Jonathan Cameron <jonathan.cameron@huawei.com>,
	Will Deacon <will@kernel.org>,
	 Arnaldo Carvalho de Melo <acme@kernel.org>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	 Ian Rogers <irogers@google.com>, Andi Kleen <ak@linux.intel.com>,
	 Thomas Gleixner <tglx@linutronix.de>,
	Borislav Petkov <bp@alien8.de>,
	 Dave Hansen <dave.hansen@linux.intel.com>,
	x86@kernel.org, H Peter Anvin <hpa@zytor.com>,
	 Kan Liang <kan.liang@linux.intel.com>,
	Zhenyu Wang <zhenyuw@linux.intel.com>,
	mizhang@google.com,  kvm@vger.kernel.org,
	Shuah Khan <shuah@kernel.org>,
	linux-kselftest@vger.kernel.org,  linux-kernel@vger.kernel.org,
	linux-perf-users@vger.kernel.org
Subject: Re: [PATCH V13 02/14] KVM: x86: Fix Intel PT IA32_RTIT_CTL MSR validation
Date: Mon, 14 Oct 2024 09:06:48 -0700	[thread overview]
Message-ID: <Zw1BcYhTxZS4E2O5@google.com> (raw)
In-Reply-To: <20241014105124.24473-3-adrian.hunter@intel.com>

"KVM: VMX:" for the scope.

And I would much prefer to actually state what is changing.  "Fix XYZ" isn't
helpful in understanding what's actually broken, fallout from the bug, etc.  It's
never easy to describe bugs where the logic is flat out busted, but I think we can
at least capture the basic gist, and allude to the badness being a wrongly disallowed
write.

On Mon, Oct 14, 2024, Adrian Hunter wrote:
> Fix KVM IA32_RTIT_CTL MSR validation logic so that if RTIT_CTL_TRACEEN
> bit is cleared, then other bits are allowed to change also. For example,
> writing 0 to IA32_RTIT_CTL in order to stop tracing, is valid.

There's a fair amount of extraneous and disctracting information in both the shortlog
and changelog.  E.g. "Intel PT IA32_RTIT_CTL MSR" can simply be MSR_IA32_RTIT_CTL.
And the 

I'll fix up to the below when applying; AFAICT, this fix is completely independent
of the rest of the series.

KVM: VMX: Allow toggling bits in MSR_IA32_RTIT_CTL when enable bit is cleared

  Allow toggling other bits in MSR_IA32_RTIT_CTL if the enable bit is being
  cleared, the existing logic simply ignores the enable bit.  E.g. KVM will
  incorrectly reject a write of '0' to stop tracing.
  
> Fixes: bf8c55d8dc09 ("KVM: x86: Implement Intel PT MSRs read/write emulation")
> Cc: stable@vger.kernel.org
> Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
>  arch/x86/kvm/vmx/vmx.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 1a4438358c5e..eaf4965ac6df 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -1635,7 +1635,8 @@ static int vmx_rtit_ctl_check(struct kvm_vcpu *vcpu, u64 data)
>  	 * result in a #GP unless the same write also clears TraceEn.
>  	 */
>  	if ((vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) &&
> -		((vmx->pt_desc.guest.ctl ^ data) & ~RTIT_CTL_TRACEEN))
> +	    (data & RTIT_CTL_TRACEEN) &&
> +	    data != vmx->pt_desc.guest.ctl)
>  		return 1;
>  
>  	/*
> -- 
> 2.43.0
> 

  reply	other threads:[~2024-10-14 16:06 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-14 10:51 [PATCH V13 00/14] perf/core: Add ability for an event to "pause" or "resume" AUX area tracing Adrian Hunter
2024-10-14 10:51 ` [PATCH V13 01/14] perf/x86/intel/pt: Fix buffer full but size is 0 case Adrian Hunter
2024-10-14 10:51 ` [PATCH V13 02/14] KVM: x86: Fix Intel PT IA32_RTIT_CTL MSR validation Adrian Hunter
2024-10-14 16:06   ` Sean Christopherson [this message]
2024-10-14 10:51 ` [PATCH V13 03/14] KVM: x86: Fix Intel PT Host/Guest mode when host tracing also Adrian Hunter
2024-10-14 18:25   ` Sean Christopherson
2024-10-22 11:07     ` Adrian Hunter
2024-10-22 16:30       ` Sean Christopherson
2024-10-22 19:31         ` Adrian Hunter
2024-10-22 22:30           ` Sean Christopherson
2024-10-23 18:09             ` Adrian Hunter
2024-10-22 23:45         ` Andi Kleen
2024-10-14 10:51 ` [PATCH V13 04/14] KVM: selftests: Add guest Intel PT test Adrian Hunter
2024-10-14 10:51 ` [PATCH V13 05/14] perf/core: Add aux_pause, aux_resume, aux_start_paused Adrian Hunter
2024-10-14 10:51 ` [PATCH V13 06/14] perf/x86/intel/pt: Add support for pause / resume Adrian Hunter
2024-10-14 10:51 ` [PATCH V13 07/14] perf/x86/intel: Do not enable large PEBS for events with aux actions or aux sampling Adrian Hunter
2024-10-14 10:51 ` [PATCH V13 08/14] perf tools: Add aux_start_paused, aux_pause and aux_resume Adrian Hunter
2024-10-14 10:51 ` [PATCH V13 09/14] perf tools: Add aux-action config term Adrian Hunter
2024-10-14 10:51 ` [PATCH V13 10/14] perf tools: Parse aux-action Adrian Hunter
2024-10-14 10:51 ` [PATCH V13 11/14] perf tools: Add missing_features for aux_start_paused, aux_pause, aux_resume Adrian Hunter
2024-10-14 11:10   ` Leo Yan
2024-10-14 10:51 ` [PATCH V13 12/14] perf intel-pt: Improve man page format Adrian Hunter
2024-10-14 10:51 ` [PATCH V13 13/14] perf intel-pt: Add documentation for pause / resume Adrian Hunter
2024-10-14 10:51 ` [PATCH V13 14/14] perf intel-pt: Add a test " Adrian Hunter

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