Re: [PATCH v1 2/2] i2c: spacemit: add support for SpacemiT K1 SoC

Troy Mitchell
2024-10-16T02:26:38Z

On 2024/10/15 17:17, Wolfram Sang wrote:
>
>> +/* spacemit i2c registers */
>> +#define ICR 0x0 /* Control Register */
>> +#define ISR 0x4 /* Status Register */
>> +#define ISAR 0x8 /* Slave Address Register */
>> +#define IDBR 0xc /* Data Buffer Register */
>> +#define ILCR 0x10 /* Load Count Register */
>> +#define IWCR 0x14 /* Wait Count Register */
>> +#define IRST_CYC 0x18 /* Bus reset cycle counter */
>> +#define IBMR 0x1c /* Bus monitor register */
>
> These registers look a lot like the ones for i2c-pxa. Can the pxa driver
> maybe be re-used for your I2C core?
>
Only a small number of bit definitions in the registers are the same [1].
Even if the logic is roughly the same. it still takes a lot of work,
and i2c-pxa cannot easily add the fifo and dma functions that k1 has.
Just my opinion, I don't think it's worth it.
of course, if you think that multiplexing i2c-pxa is a better decision.
I'd be happy to adopt it

Link: https://developer.spacemit.com/documentation?token=Rn9Kw3iFHirAMgkIpTAcV2Arnkf#part2065 [1]