Re: [PATCH 1/1] KVM: nVMX: update VPPR on vmlaunch/vmresume

[Chao Gao <chao.gao@intel.com>]

>
>I don't think we need a new request for this, KVM can refresh SVI directly in
>nested_vmx_vmexit(), e.g. along with change_vmcs01_virtual_apic_mode and friends.

Agree.

>
>> +	}
>> +
>>  	vcpu->stat.guest_mode = 0;
>>  }
>>  
>> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
>> index 5bb481aefcbc..d6a03c30f085 100644
>> --- a/arch/x86/kvm/lapic.c
>> +++ b/arch/x86/kvm/lapic.c
>> @@ -800,6 +800,9 @@ static inline void apic_clear_isr(int vec, struct kvm_lapic *apic)
>>  	if (!__apic_test_and_clear_vector(vec, apic->regs + APIC_ISR))
>>  		return;
>>  
>> +	if (is_guest_mode(apic->vcpu))
>
>As above, I think this needs to be
>
>	if (is_guest_mode(apic->vcpu) && !nested_cpu_has_vid(get_vmcs12(vcpu)))
>
>because if virtual interrupt delivery is enabled, then EOIs are virtualized.
>Which means that this needs to be handled in vmx_hwapic_isr_update().

I'm not sure if nested_cpu_has_vid() is necessary. My understanding is that
when a bit in the vCPU's vISR is cleared, the vCPU's SVI (i.e., SVI in vmcs01)
may be stale and so needs an update if vmcs01 isn't the active VMCS (i.e., the
vCPU is in guest mode).

If L1 enables VID and EOIs from L2 are virtualized by KVM (L0), KVM shouldn't
call this function in the first place. Because KVM should update the
'virt-APIC' page in VMCS12, rather than updating the vISR of the vCPU.

>
>Hmm, actually, there's more to it, I think.  If virtual interrupt deliver is
>disabled for L2, then writing vmcs02 is pointless because GUEST_INTR_STATUS is
>unused by the CPU.
>
>Argh, but hwapic_isr_update() doesn't take @vcpu.  That's easy enough to fix,
>just annoying.
>
>Chao, can you provide your SoB for your code?  If you've no objections, I'll
>massage it to avoid using a request and write a changelog, and then post it as
>part of a small series.

Sure.

Signed-off-by: Chao Gao <chao.gao@intel.com>

Thanks for your help.

>
>Thanks again!
>
>> +		apic->vcpu->arch.update_hwapic_isr = true;
>> +
>>  	/*
>>  	 * We do get here for APIC virtualization enabled if the guest
>>  	 * uses the Hyper-V APIC enlightenment.  In this case we may need