Re: [PATCH 1/2] KVM: x86: Plumb in the vCPU to kvm_x86_ops.hwapic_isr_update()

[Sean Christopherson <seanjc@google.com>]

On Mon, Nov 04, 2024, Chao Gao wrote:
> On Fri, Nov 01, 2024 at 12:21:13PM -0700, Sean Christopherson wrote:
> >Pass the target vCPU to the hwapic_isr_update() vendor hook so that VMX
> >can defer the update until after nested VM-Exit if an EOI for L1's vAPIC
> >occurs while L2 is active.
> >
> >No functional change intended.
> >
> >Cc: stable@vger.kernel.org
> >Signed-off-by: Sean Christopherson <seanjc@google.com>
> 
> Reviewed-by: Chao Gao <chao.gao@intel.com>
> 
> >---
> > arch/x86/include/asm/kvm_host.h |  2 +-
> > arch/x86/kvm/lapic.c            | 11 +++++------
> > arch/x86/kvm/vmx/vmx.c          |  2 +-
> > arch/x86/kvm/vmx/x86_ops.h      |  2 +-
> > 4 files changed, 8 insertions(+), 9 deletions(-)
> >
> >diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> >index 70c7ed0ef184..3f3de047cbfd 100644
> >--- a/arch/x86/include/asm/kvm_host.h
> >+++ b/arch/x86/include/asm/kvm_host.h
> >@@ -1734,7 +1734,7 @@ struct kvm_x86_ops {
> > 	bool allow_apicv_in_x2apic_without_x2apic_virtualization;
> > 	void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
> > 	void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
> >-	void (*hwapic_isr_update)(int isr);
> >+	void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
> > 	void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
> > 	void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
> > 	void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);
> >diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> >index 65412640cfc7..5be2be44a188 100644
> >--- a/arch/x86/kvm/lapic.c
> >+++ b/arch/x86/kvm/lapic.c
> >@@ -763,7 +763,7 @@ static inline void apic_set_isr(int vec, struct kvm_lapic *apic)
> > 	 * just set SVI.
> > 	 */
> > 	if (unlikely(apic->apicv_active))
> >-		kvm_x86_call(hwapic_isr_update)(vec);
> >+		kvm_x86_call(hwapic_isr_update)(apic->vcpu, vec);
> 
> Both branches need braces here. So, maybe take the opportunity to fix the
> coding style issue.

Very tempting, but since this is destined for stable, I'll go with a minimal patch
to reduce the odds of creating a conflict.

> > 	else {
> > 		++apic->isr_count;
> > 		BUG_ON(apic->isr_count > MAX_APIC_VECTOR);
> >@@ -808,7 +808,7 @@ static inline void apic_clear_isr(int vec, struct kvm_lapic *apic)
> > 	 * and must be left alone.
> > 	 */
> > 	if (unlikely(apic->apicv_active))
> >-		kvm_x86_call(hwapic_isr_update)(apic_find_highest_isr(apic));
> >+		kvm_x86_call(hwapic_isr_update)(apic->vcpu, apic_find_highest_isr(apic));