Re: [PATCh 0/3] x86,tlb: context switch optimizations

[Ingo Molnar <mingo@kernel.org>]

* Rik van Riel <riel@surriel.com> wrote:

> On Wed, 13 Nov 2024 10:55:50 +0100
> Borislav Petkov <bp@alien8.de> wrote:
> 
> > On Fri, Nov 08, 2024 at 07:27:47PM -0500, Rik van Riel wrote:
> > > While profiling switch_mm_irqs_off with several workloads,
> > > it appears there are two hot spots that probably don't need
> > > to be there.  
> > 
> > One of those three is causing the below here, zapping them from tip.
> > 
> 
> TL;DR: __text_poke ends up sending IPIs with interrupts disabled.
> 
> > [    3.186469]  on_each_cpu_cond_mask+0x50/0x90
> > [    3.186469]  flush_tlb_mm_range+0x1a8/0x1f0
> > [    3.186469]  ? cpu_bugs_smt_update+0x14/0x1f0
> > [    3.186469]  __text_poke+0x366/0x5d0
> 
> Here is an alternative to avoid __text_poke() from calling
> on_each_cpu_cond_mask() with IRQs disabled:
> 
> ---8<---
> From e872edeaad14c793036f290afc28000281e1b76a Mon Sep 17 00:00:00 2001
> From: Rik van Riel <riel@surriel.com>
> Date: Wed, 13 Nov 2024 09:51:16 -0500
> Subject: [PATCH] x86/alternatives: defer poking_mm TLB flush to next use

I'd argue *both* of your patches improve the code, right?

Mind sending an updated series? It might not make it into the merge window,
but these look like good changes to me.

Thanks,

	Ingo