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From: "Daniel Walker (danielwa)" <danielwa@cisco.com>
To: Shinichiro Kawasaki <shinichiro.kawasaki@wdc.com>
Cc: "Hans de Goede" <hdegoede@redhat.com>,
	"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
	"Ilpo J�rvinen" <ilpo.jarvinen@linux.intel.com>,
	"Klara Modin" <klarasmodin@gmail.com>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Danil Rybakov" <danilrybakov249@gmail.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"xe-linux-external(mailer list)" <xe-linux-external@cisco.com>
Subject: Re: platform/x86: p2sb: Allow p2sb_bar() calls during PCI device probe
Date: Fri, 15 Nov 2024 14:57:19 +0000	[thread overview]
Message-ID: <ZzdhTsuRNk1YWg8p@goliath> (raw)
In-Reply-To: <wxb4hmju5jknxr2bclxlu5gujgmb3vvqwub7jrt4wofllqp7li@pdvthto4jf47>

[-- Attachment #1: Type: text/plain, Size: 2247 bytes --]

On Fri, Nov 15, 2024 at 11:35:46AM +0000, Shinichiro Kawasaki wrote:
> On Nov 13, 2024 / 19:34, Hans de Goede wrote:
> > Hi,
> > 
> > On 13-Nov-24 6:41 PM, Daniel Walker (danielwa) wrote:
> > > On Wed, Nov 13, 2024 at 06:04:44PM +0100, Hans de Goede wrote:
> > >> Hi,
> > >>
> > >> On 13-Nov-24 5:33 PM, Hans de Goede wrote:
> > >>> Hi,
> > >>>
> > >>> On 13-Nov-24 5:24 PM, Hans de Goede wrote:
> [...]
> > >>> It probably has something to do with these 2 messages:
> > >>>
> > >>> pci 0000:00:1f.1: BAR 0 [mem 0xfd000000-0xfdffffff 64bit]: can't claim; no compatible bridge window
> > >>> pci 0000:00:1f.1: BAR 0 [mem 0x280000000-0x280ffffff 64bit]: assigned
> > >>>
> > >>> I'm guessing that this re-assignment is messing up
> > >>> the p2sb BAR caching, after which things go wrong.
> > >>
> > >> Hmm, but that should be fixed by 2c6370e66076 ("platform/x86: p2sb: Don't init until unassigned resources have been assigned")
> > >>
> > >> and you are seeing this with 6.12, which has that.
> > >>
> > >> Can you try adding a pr_info() to the top of p2sb_cache_resources()
> > >> with 6.12 and then collec a new dmesg ?
> > >>
> > >> If that pr_info() is done after the:
> > >>
> > >> pci 0000:00:1f.1: BAR 0 [mem 0x280000000-0x280ffffff 64bit]: assigned
> > >>
> > >> message then that does not explain things.
> > >>
> > > 
> > > I haven't testing adding a pr_info() but the messages seem to happen in the same
> > > order in both working and non-working cases.
> > > 
> > > Does that matter?
> > 
> > The working case does not do the bar caching, we want to know if the
> > bar caching in the non working case happens before or after the assignment:
> > 
> > pci 0000:00:1f.1: BAR 0 [mem 0x280000000-0x280ffffff 64bit]: assigned
> > 
> > It should happen after the assignment.
> 
> Hello Daniel,
> 
> It's my sorrow that the change cause this trouble. I have created a debug patch
> for the kernel and attached to this e-mail. It adds some pr_info() to answer
> the question from Hans. It will also show us a bit more things. Could you try it
> on your system? It should apply to v6.12-rcX kernels without conflicts.
> 

Ok.. The dmesg with the patch applied is attached.

Daniel



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  reply	other threads:[~2024-11-15 14:57 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-13 15:42 platform/x86: p2sb: Allow p2sb_bar() calls during PCI device probe Daniel Walker (danielwa)
2024-11-13 16:24 ` Hans de Goede
2024-11-13 16:33   ` Hans de Goede
2024-11-13 16:38     ` Hans de Goede
2024-11-13 17:19       ` Daniel Walker (danielwa)
2024-11-13 17:04     ` Hans de Goede
2024-11-13 17:41       ` Daniel Walker (danielwa)
2024-11-13 18:34         ` Hans de Goede
2024-11-15 11:35           ` Shinichiro Kawasaki
2024-11-15 14:57             ` Daniel Walker (danielwa) [this message]
2024-11-18 11:30               ` Shinichiro Kawasaki
2024-11-18 11:42                 ` Hans de Goede
2024-11-18 12:14                   ` Andy Shevchenko
2024-11-18 12:40                 ` Daniel Walker (danielwa)
2024-11-18 13:24                   ` Andy Shevchenko
2024-11-18 13:29                     ` Hans de Goede
2024-11-18 13:52                       ` Andy Shevchenko
2024-11-18 13:32                     ` Daniel Walker (danielwa)
2024-11-18 13:49                       ` Andy Shevchenko
2024-11-18 14:35                         ` Daniel Walker (danielwa)
2024-11-18 15:55                           ` Andy Shevchenko
2024-11-18 16:00                             ` Hans de Goede
2024-11-18 16:08                               ` Andy Shevchenko
2024-11-18 17:15                               ` Daniel Walker (danielwa)
2024-11-19  2:20                                 ` Shinichiro Kawasaki
2024-11-19  9:37                                   ` Andy Shevchenko
2024-11-20  4:03                                     ` Shinichiro Kawasaki
2024-11-19 18:28                                   ` Hans de Goede
2024-11-19 20:51                                     ` Daniel Walker (danielwa)
2024-11-20  7:06                                     ` Shinichiro Kawasaki
2024-11-19  9:41                                 ` Andy Shevchenko
2024-11-19 14:47                                   ` Daniel Walker (danielwa)
2024-11-19 15:03                                     ` Andy Shevchenko
2024-11-13 19:17     ` Andy Shevchenko
2024-11-16 11:34       ` Hans de Goede
2024-11-18 10:05         ` Andy Shevchenko

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