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Fri, 25 Jul 2025 13:15:58 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id DB8284004B; Fri, 25 Jul 2025 13:14:29 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 1D0D137A632; Fri, 25 Jul 2025 13:13:24 +0200 (CEST) Received: from [10.48.86.185] (10.48.86.185) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Jul 2025 13:13:23 +0200 Message-ID: Date: Fri, 25 Jul 2025 13:13:22 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [Linux-stm32] [PATCH 09/12] arm64: dts: st: add lvds support on stm32mp255 From: Clement LE GOFFIC To: Raphael Gallais-Pou , Yannick Fertre , Philippe Cornu , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Catalin Marinas , Will Deacon , Christophe Roullier CC: , , , , References: <20250725-drm-misc-next-v1-0-a59848e62cf9@foss.st.com> <20250725-drm-misc-next-v1-9-a59848e62cf9@foss.st.com> <85673db7-d311-47cc-be52-291d94e136e4@foss.st.com> Content-Language: en-US In-Reply-To: <85673db7-d311-47cc-be52-291d94e136e4@foss.st.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-25_03,2025-07-24_01,2025-03-28_01 On 7/25/25 13:08, Clement LE GOFFIC wrote: > Hi Raphael, > > On 7/25/25 12:04, Raphael Gallais-Pou wrote: >> The LVDS is used on STM32MP2 as a display interface. >> >> Add the LVDS node. >> >> Signed-off-by: Raphael Gallais-Pou >> --- >>   arch/arm64/boot/dts/st/stm32mp255.dtsi | 12 ++++++++++++ >>   1 file changed, 12 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/ >> dts/st/stm32mp255.dtsi >> index >> f689b47c5010033120146cf1954d6624c0270045..a4d965f785fa42c4597494010855aec7e1b9fdd1 100644 >> --- a/arch/arm64/boot/dts/st/stm32mp255.dtsi >> +++ b/arch/arm64/boot/dts/st/stm32mp255.dtsi >> @@ -6,6 +6,18 @@ >>   #include "stm32mp253.dtsi" >>   &rifsc { >> +    lvds: lvds@48060000 { >> +        compatible = "st,stm32mp25-lvds"; > > For the compatible you now need one comaptible per SoC. > It means your compatible should look like : "st,stm32mp251-lvds". > This way, if on the 253 or 255 there is an issue you are able to easily > add match data in the driver with compatible "st,stm32mp253-lvds" or > "st,stm32mp255-lvds". > A prior discussion on this subject has been raised on my V1 of HDP > involving Krzysztof and Alexandre : > https://lore.kernel.org/all/418a80a9-8c08-4dd1- > bf49-1bd7378321aa@kernel.org/ Woops, this comment should target the add of the ltdc compatible as I see that lvds one already exists and can't be changed. Though the main idea is here. > >> +        #clock-cells = <0>; >> +        reg = <0x48060000 0x2000>; >> +        clocks = <&rcc CK_BUS_LVDS>, <&rcc CK_KER_LVDSPHY>; >> +        clock-names = "pclk", "ref"; >> +        resets = <&rcc LVDS_R>; >> +        access-controllers = <&rifsc 84>; >> +        power-domains = <&CLUSTER_PD>; >> +        status = "disabled"; >> +    }; >> + >>       vdec: vdec@480d0000 { >>           compatible = "st,stm32mp25-vdec"; >>           reg = <0x480d0000 0x3c8>; >> > > Best regards, > Clément