Re: [PATCH 7/8] arm64: dts: qcom: ipq9574: Add USB related nodes

Varadarajan Narayanan
2023-03-03T09:53:14Z

On 3/3/2023 1:09 PM, Krzysztof Kozlowski wrote:
> On 02/03/2023 10:55, Varadarajan Narayanan wrote:
>> Add USB phy and controller related nodes
>>
>> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/ipq9574.dtsi | 92 +++++++++++++++++++++++++++++++++++
>> 1 file changed, 92 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> index 2bb4053..319b5bd 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> @@ -215,6 +215,98 @@
>> #size-cells = <1>;
>> ranges = <0 0 0 0xffffffff>;
>>
>> + ssphy_0: ssphy@7D000 {
> Node names should be generic.
> https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
>
> Does not look like you tested the DTS against bindings. Please run `make
> dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst
> for instructions).
>
>> + compatible = "qcom,ipq9574-qmp-usb3-phy";
>> + reg = <0x7D000 0x1C4>;
>> + #clock-cells = <1>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + clocks = <&gcc GCC_USB0_AUX_CLK>,
>> + <&gcc GCC_USB0_PHY_CFG_AHB_CLK>;
>> + clock-names = "aux", "cfg_ahb";
>> +
>> + resets = <&gcc GCC_USB0_PHY_BCR>,
>> + <&gcc GCC_USB3PHY_0_PHY_BCR>;
>> + reset-names = "phy","common";
>> + status = "disabled";
>> +
>> + usb0_ssphy: lane@7D200 {
>> + reg = <0x0007D200 0x130>, /* Tx */
>> + <0x0007D400 0x200>, /* Rx */
>> + <0x0007D800 0x1F8>, /* PCS */
>> + <0x0007D600 0x044>; /* PCS misc */
>> + #phy-cells = <0>;
>> + clocks = <&gcc GCC_USB0_PIPE_CLK>;
>> + clock-names = "pipe0";
>> + clock-output-names = "gcc_usb0_pipe_clk_src";
>> + };
>> + };
>> +
>> + qusb_phy_0: qusb@7B000 {
> Node names should be generic.
> https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
>
> Does not look like you tested the DTS against bindings. Please run `make
> dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst
> for instructions).
>
>> + compatible = "qcom,ipq9574-qusb2-phy";
>> + reg = <0x07B000 0x180>;
> Lowercase hex everywhere.
>
>> + #phy-cells = <0>;
>> +
>> + clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
>> + <&xo_board_clk>;
>> + clock-names = "cfg_ahb", "ref";
>> +
>> + resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
>> + status = "disabled";
>> + };
>> +
>> + usb3: usb3@8A00000 {
> Node names should be generic.
> https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
>
> Does not look like you tested the DTS against bindings. Please run `make
> dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst
> for instructions).
>
>> + compatible = "qcom,dwc3";
>> + reg = <0x8AF8800 0x400>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + clocks = <&gcc GCC_SNOC_USB_CLK>,
>> + <&gcc GCC_ANOC_USB_AXI_CLK>,
>> + <&gcc GCC_USB0_MASTER_CLK>,
>> + <&gcc GCC_USB0_SLEEP_CLK>,
>> + <&gcc GCC_USB0_MOCK_UTMI_CLK>;
>> +
>> + clock-names = "sys_noc_axi",
>> + "anoc_axi",
>> + "master",
>> + "sleep",
>> + "mock_utmi";
>> +
>> + assigned-clocks = <&gcc GCC_SNOC_USB_CLK>,
>> + <&gcc GCC_ANOC_USB_AXI_CLK>,
>> + <&gcc GCC_USB0_MASTER_CLK>,
>> + <&gcc GCC_USB0_MOCK_UTMI_CLK>;
>> + assigned-clock-rates = <200000000>,
>> + <200000000>,
>> + <200000000>,
>> + <24000000>;
>> +
>> + resets = <&gcc GCC_USB_BCR>;
>> + status = "disabled";
>> +
>> + dwc_0: dwc3@8A00000 {
> Node names should be generic.
> https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
>
> Does not look like you tested the DTS against bindings. Please run `make
> dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst
> for instructions).
>
>
> Best regards,
> Krzysztof
>
Sorry. Will rectify and post a new version.

Thank

Varada