From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03CD31E515; Sun, 8 Feb 2026 11:18:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770549492; cv=none; b=mBofgiN7B9ftid6T+mZeW/ipZOn/WTlKMfsBwXi0+eo0PdyakZEPtkp+3DPffc/VfRt+kp2/XW2pDSzb0ZmscKFKH0UdO3vlDcNPFyV2s0s87LcSLWjW+2tNPXvCI5hBHCr3PR98Dj1TmGn8NR9BCGGZEr48gFe2r/lRJa7DEoI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770549492; c=relaxed/simple; bh=NLj9JY3v7IxWsY6NHuRMWN3dfT18WLoyUjj/VCFKPrA=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=LS1+RqbsiyPtSX2Ah4dNwzVL82q/08MM3E/Ur9mjZkCXdZYiqFZ3bcl4syG3CfaOOamP8H21/lcuntkZBMcRWKlu2zaxZEdOesMtsdTCsz9Mx1QvE4VlGlW4FcIWvMksfPihWexw1vhUsNZuxG02dpgBVi1kNqc0FMf5RSuzR4c= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lwTs6gUq; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lwTs6gUq" Received: by smtp.kernel.org (Postfix) with ESMTPSA id CD797C4CEF7; Sun, 8 Feb 2026 11:18:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770549491; bh=NLj9JY3v7IxWsY6NHuRMWN3dfT18WLoyUjj/VCFKPrA=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=lwTs6gUqyZ6xYI6NBqd48OvHOuiapcAeHwd1KWiBNIsD83dYoA3PUCYMYgGvnCk/N OtDzkzdp33/F+P+GVXL8dmNU6GOXTOkyuWVG8xRIYEfTfrJFz3r163fR63bYI6aYNq F1G3IKfcz748vNOgoMQtSoNIdru+uIowkPCk8g81YvqPvZ4+4mDW0UbOGzll10VGv5 icoScDxGRDj22R4i+9IYqfdeWqvr+MEcLyENe6Yg5Xcz6hR2xNL+36RHtDHj9f5MRl //0dGXwkKj6i+eHoXdhqhmI9BR+J4H4ol6kxQgZmXd2XMzJJJKtCQYKxu8ucn77THw xJT9rEnfbiYKw== Message-ID: Date: Sun, 8 Feb 2026 12:18:05 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 8/8] arm64: defconfig: Enable NVIDIA TEGRA410 PMU To: Besar Wicaksono , will@kernel.org, suzuki.poulose@arm.com, robin.murphy@arm.com, ilkka@os.amperecomputing.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org, mark.rutland@arm.com, treding@nvidia.com, jonathanh@nvidia.com, vsethi@nvidia.com, rwiley@nvidia.com, sdonthineni@nvidia.com, skelley@nvidia.com, ywan@nvidia.com, mochs@nvidia.com, nirmoyd@nvidia.com References: <20260126181155.2776097-1-bwicaksono@nvidia.com> <20260126181155.2776097-9-bwicaksono@nvidia.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 26/01/2026 19:11, Besar Wicaksono wrote: > Enable driver for NVIDIA TEGRA410 CMEM Latency and C2C PMU device. Why? Why do we want it? Which *upstream board* uses it? Best regards, Krzysztof