From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1BE8025B0AF for ; Thu, 14 May 2026 01:20:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778721623; cv=none; b=LTCg0qRJte4ahwHvcn4+lelR0keXb2Q0Eh4QVLjka88xedXMJsMIUfUI2992stbpR/z7BdAH/BnUJeADBlBD38ktKG1MFHXDE8XvfqDU9ZXUKgci7fsl29OGlYo36Etm4LW/RBDTogtyTB/xX/uIJvwHH+w9CiOL8fNKuQZNmtE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778721623; c=relaxed/simple; bh=Vikb1ma9EMjiEHU0VSHq33bf6jhsP4o5/IdgpABneh8=; h=Date:From:To:cc:Subject:In-Reply-To:Message-ID:References: MIME-Version:Content-Type; b=JG6hFoMfQzFI7D+ueBejc+TNTUqp9aNPMc+e1qGJtVuYXKmR3lOSiDZC1w+4t0kuYDiCSAAfdTlFo/3cfqQAywtiF6mXf4Fxz04uBdCkFxreABef8ZZxi55AXY17UTH7NrMEX/jhMppcDai3TfN+IBbZyuFPp2+VBlc5iFn5+fY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Fo+qFr9S; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Fo+qFr9S" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2ED63C19425; Thu, 14 May 2026 01:20:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778721622; bh=Vikb1ma9EMjiEHU0VSHq33bf6jhsP4o5/IdgpABneh8=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=Fo+qFr9SogPd1vIkvhp2DSX6Lzt0vQZZJYH/dQ8rw/4sI9F85Bj/lk/RDvN4L4Vy4 +n+6jCEAgIjjFlXVRJ4zW46E967csMD5Dqch2HhboEh4Au1wsuLSKmOtlg8Dao11Ug zHdsmMzjtYhos+g6Cfq6q7v8rkYMZeHbFcqIT1gcxnC3jfemmIfzXPhan41hv2RwVG lyu+ogXxx6lXcS/TmaWJ/SN9KPce5oVprtRWmn6sdHMhY9Vl3UhQmpgWe9aLld5EHm pwUJOt8a6VX4aQC/1cq4cZRzR7BQiypGhAOwUZFziMD9kV+AdEtQERPDZYrEP5Q35T IuM3LXqpB/BRA== Date: Wed, 13 May 2026 19:20:21 -0600 (MDT) From: Paul Walmsley To: Zong Li cc: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, debug@rivosinc.com, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, david.laight.linux@gmail.com Subject: Re: [PATCH v2] riscv: cif: reduce shadow stack size limit from 4GB to 2GB In-Reply-To: <20260428024105.645162-1-zong.li@sifive.com> Message-ID: References: <20260428024105.645162-1-zong.li@sifive.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Hi, On Mon, 27 Apr 2026, Zong Li wrote: > Follow the ARM64 GCS (Guarded Control Stack) implementation approach > by reducing the shadow stack size allocation from min(RLIMIT_STACK, 4GB) > to min(RLIMIT_STACK/2, 2GB). see commit '506496bcbb42 "arm64/gcs: Ensure > that new threads have a GCS")' Sashiko caught that this patch doesn't exactly follow the ARM implementation, in that it doesn't include the max(PAGE_SIZE, size) constraint, which covers the case where someone sets RLIMIT_STACK to something absurdly small ( < PAGE_SIZE ). Care to fix that and post a new version? thanks - Paul