Re: [PATCH 1/8] media: dt-bindings: qcom-kaanapali-iris: Add kaanapali video codec binding

Krzysztof Kozlowski
2025-09-25T09:08:55Z

On Thu, 25 Sept 2025 at 08:16, Vikash Garodia
<vikash.garodia@oss.qualcomm.com> wrote:
>
> Kaanapali SOC brings in the new generation of video IP i.e iris4. When
> compared to previous generation, iris3x, it has,
> - separate power domains for stream and pixel processing hardware blocks
> (bse and vpp).
> - additional power domain for apv codec.
> - power domains for individual pipes (VPPx).
> - different clocks and reset lines.
>
> There are variants of this hardware, where only a single VPP pipe would
> be functional (VPP0), and APV may not be present. In such case, the
> hardware can be enabled without those 2 related power doamins, and
> corresponding clocks. This explains the min entries for power domains
> and clocks.
> Iommus include all the different stream-ids which can be possibly
> generated by vpu4 video hardware in both secure and non secure
> execution mode.
>
> This patch depends on following patches

No, it cannot.

Don't send such patches then. We gave you already clear guidance how
this is supposed to be solved.

> https://lore.kernel.org/all/20250924-knp-interconnect-v1-1-4c822a72141c@oss.qualcomm.com/
> https://lore.kernel.org/all/20250924-knp-clk-v1-3-29b02b818782@oss.qualcomm.com/
>
> Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
> ---
> .../bindings/media/qcom,kaanapali-iris.yaml | 236 +++++++++++++++++++++
> 1 file changed, 236 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml b/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..f3528d514fe29771227bee5f156962fedb1ea9cd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml
> @@ -0,0 +1,236 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/qcom,kaanapali-iris.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm kaanapali iris video encode and decode accelerators
> +
> +maintainers:
> + - Vikash Garodia <vikash.garodia@oss.qualcomm.com>
> + - Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
> +
> +description:
> + The iris video processing unit is a video encode and decode accelerator
> + present on Qualcomm platforms.
> +
> +properties:
> + compatible:
> + const: qcom,kaanapali-iris
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + power-domains:
> + minItems: 5
> + maxItems: 7
> +
> + power-domain-names:

Wrong constraints, see writing bindings.

> + items:
> + - const: venus
> + - const: vcodec0
> + - const: vpp0
> + - const: vpp1
> + - const: apv
> + - const: mxc
> + - const: mmcx
> +
> + clocks:
> + minItems: 8
> + maxItems: 10

also wrong

> +
> + clock-names:
> + items:
> + - const: iface
> + - const: core
> + - const: vcodec0_core
> + - const: iface1
> + - const: core_freerun
> + - const: vcodec0_core_freerun
> + - const: vcodec_bse
> + - const: vcodec_vpp0
> + - const: vcodec_vpp1
> + - const: vcodec_apv
> +
> + interconnects:
> + maxItems: 2
> +
> + interconnect-names:
> + items:
> + - const: cpu-cfg
> + - const: video-mem
> +
> + resets:
> + maxItems: 4
> +
> + reset-names:
> + items:
> + - const: bus0
> + - const: bus1
> + - const: core_freerun_reset
> + - const: vcodec0_core_freerun_reset
> +
> + iommus:
> + minItems: 3
> + maxItems: 8

No, you need to list the items.

You've been told that already in that discussion.

> +
> + memory-region:
> + maxItems: 1
> +
> + dma-coherent: true
> +
> + operating-points-v2: true
> +
> + opp-table:
> + type: object
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - power-domains
> + - power-domain-names
> + - clocks
> + - clock-names
> + - interconnects
> + - interconnect-names
> + - resets
> + - reset-names
> + - iommus
> + - dma-coherent
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interconnect/qcom,kaanapali-rpmh.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/qcom,kaanapali-gcc.h>
> + #include <dt-bindings/interconnect/qcom,icc.h>
> + #include <dt-bindings/power/qcom,rpmhpd.h>
> +
> + video-codec@2000000 {
> + compatible = "qcom,kaanapali-iris";
> +

Please read dts coding style and look how dts for Qualcomm is written.

> + reg = <0x02000000 0xf0000>;
> +
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> +
> + power-domains = <&video_cc_mvs0c_gdsc>,
,
Krzysztof