From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B87968F58 for ; Thu, 2 Jan 2025 03:15:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735787750; cv=none; b=abKvMEmjBkslLbl5R7Ng/nunIkNuHiWc7YTV9LRXaRwqvGFDf9Bmy01J7xyKBMtLdbsgV15tde4JBphijwA3ZE0xpJ0UWYZqGnaiy45X50GVLPieZYmqWBxj404TCK+fG9Syk/Dw5bJUewDKZQbUGn9NSsiWcW1qNzBLVjrv7t4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1735787750; c=relaxed/simple; bh=2wbmftJym0yyymB+UYPZydgGM44Lq28ISsDSJcaq6LA=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=VhE3x/gPV67fuNKLwKK5zrXWvtDeo1ZEtpmgPbeCExDxGydwBh1ltpHZUEDSQSZzgqcrC1vobFEZm0PXzQuQMBb3Do5LO8dPndh+zhl8xfeIOmz8uRnAPb6qufaPgX4EyIVtevZpkY7MQgdtwFFo1Q8459QnxP7tGDVca18EraQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Lw/fTnl4; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Lw/fTnl4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1735787749; x=1767323749; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=2wbmftJym0yyymB+UYPZydgGM44Lq28ISsDSJcaq6LA=; b=Lw/fTnl4Yo17lxF1+8sf4tvVRVG76Sxyrc6ksaVu016HcOSbjW417s84 dO5Ij5UYXt3svgmFo9veWJJqBcF9yVEYNSt5+ADVKpGURwo/ai8yxQ4SY UL5KLyqu0VnKJ/6WWc7/MalEDAr0Ni8393LNbvmAkoe4TgjUz7nePvky2 bYZhKJhpIr0eLywdxnYOyjn9XOfL9zwvIlPbsXo3LVuhDveY2Kp1DEdL+ OUnq1yW3nw7PGvuN+Cu4fsEjyK0RtUkVoL2PGr2qtAZ7GdWX4jvUDARA8 WA8kMTYRarSml2IQfGuukqWCdsY9/dD+HqX5As7F9czdmoaU1ZktbpcZa A==; X-CSE-ConnectionGUID: a8r1KmaeTaK/mgA3Jp4h7w== X-CSE-MsgGUID: Nnn3qyBfTzCeCaw1oYZMqA== X-IronPort-AV: E=McAfee;i="6700,10204,11302"; a="47015024" X-IronPort-AV: E=Sophos;i="6.12,284,1728975600"; d="scan'208";a="47015024" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jan 2025 19:15:48 -0800 X-CSE-ConnectionGUID: 2UEzaTBtSgaf0gVoHcjEHQ== X-CSE-MsgGUID: bl2aJrsTTAqMwSD4uA/k1Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="102238929" Received: from allen-sbox.sh.intel.com (HELO [10.239.159.30]) ([10.239.159.30]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jan 2025 19:15:47 -0800 Message-ID: Date: Thu, 2 Jan 2025 11:13:48 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/1] iommu/vt-d: Draining PRQ in sva unbind path when FPD bit set To: Joerg Roedel , Will Deacon , Robin Murphy , Kevin Tian , Yi Liu Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org References: <20241217024240.139615-1-baolu.lu@linux.intel.com> Content-Language: en-US From: Baolu Lu In-Reply-To: <20241217024240.139615-1-baolu.lu@linux.intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 12/17/24 10:42, Lu Baolu wrote: > When a device uses a PASID for SVA (Shared Virtual Address), it's possible > that the PASID entry is marked as non-present and FPD bit set before the > device flushes all ongoing DMA requests and removes the SVA domain. This > can occur when an exception happens and the process terminates before the > device driver stops DMA and calls the iommu driver to unbind the PASID. > > There's no need to drain the PRQ in the mm release path. Instead, the PRQ > will be drained in the SVA unbind path. But in such case, > intel_pasid_tear_down_entry() only checks the presence of the pasid entry > and returns directly. > > Add the code to clear the FPD bit and drain the PRQ. > > Suggested-by: Kevin Tian > Signed-off-by: Lu Baolu > --- > drivers/iommu/intel/pasid.c | 22 +++++++++++++++++++++- > drivers/iommu/intel/pasid.h | 6 ++++++ > 2 files changed, 27 insertions(+), 1 deletion(-) Queued for v6.14.