Re: [PATCH] PCI: dw-rockchip: Configure max payload size on host init

Niklas Cassel
2025-04-18T14:55:14Z

On 18 April 2025 14:33:08 CEST, Hans Zhang <18255117159@163.com> wrote:
>
>Dear Bjorn,
>
>Thanks your for reply. Niklas and I attempted to modify the relevant logic in drivers/pci/probe.c and found that there was a lot of code judging the global variable pcie_bus_config. At present, there is no good method. I will keep trying.
>
>I wonder if you have any good suggestions? It seems that the code logic regarding pcie_bus_config is a little complicated and cannot be modified for the time being?

Hans,

If:

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 364fa2a514f8..2e1c92fdd577 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -2983,6 +2983,13 @@ void pcie_bus_configure_settings(struct pci_bus *bus)
if (!pci_is_pcie(bus->self))
return;
+ /*
+ * Start off with DevCtl.MPS == DevCap.MPS, unless PCIE_BUS_TUNE_OFF.
+ * This might get overriden by a MPS strategy below.
+ */
+ if (pcie_bus_config != PCIE_BUS_TUNE_OFF)
+ smpss = pcie_get_mps(bus->self);
+
/*
* FIXME - Peer to peer DMA is possible, though the endpoint would need
* to be aware of the MPS of the destination. To work around this,

does not work, can't you modify the code slightly so that it works?

I haven't tried myself, but considering that it works when walking the bus, it seems that it should be possible to get something working.

Kind regards,
Niklas