Re: [PATCH] [RFC] x86/cpu: rework instruction set selection

[Ingo Molnar <mingo@kernel.org>]

* Arnd Bergmann <arnd@kernel.org> wrote:

> From: Arnd Bergmann <arnd@arndb.de>
> 
> With cx8 and tsc being mandatory features, the only important
> architectural features are now cmov and pae.
> 
> Change the large list of target CPUs to no longer pick the instruction set
> itself but only the mtune= optimization level and in-kernel optimizations
> that remain compatible with all cores.
> 
> The CONFIG_X86_CMOV instead becomes user-selectable and is now how
> Kconfig picks between 586-class (Pentium, Pentium MMX, K6, C3, GeodeGX)
> and 686-class (everything else) targets.
> 
> In order to allow running on late 32-bit cores (Athlon, Pentium-M,
> Pentium 4, ...), the X86_L1_CACHE_SHIFT can no longer be set to anything
> lower than 6 (i.e. 64 byte cache lines).
> 
> The optimization options now depend on X86_CMOV and X86_PAE instead
> of the other way round, while other compile-time conditionals that
> checked for MATOM/MGEODEGX1 instead now check for CPU_SUP_* options
> that enable support for a particular CPU family.
> 
> Link: https://lore.kernel.org/lkml/dd29df0c-0b4f-44e6-b71b-2a358ea76fb4@app.fastmail.com/
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> This is what I had in mind as mentioned in the earlier thread on
> cx8/tsc removal. I based this on top of the Ingo's [RFC 15/15]
> patch.
> ---
>  arch/x86/Kconfig                |   2 +-
>  arch/x86/Kconfig.cpu            | 100 ++++++++++++++------------------
>  arch/x86/Makefile_32.cpu        |  48 +++++++--------
>  arch/x86/include/asm/vermagic.h |  36 +-----------
>  arch/x86/kernel/tsc.c           |   2 +-
>  arch/x86/xen/Kconfig            |   1 -
>  drivers/misc/mei/Kconfig        |   2 +-
>  7 files changed, 74 insertions(+), 117 deletions(-)

While the simplification is nice on its face, this looks messy:

> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index a9d717558972..1e33f88c9b97 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -1438,7 +1438,7 @@ config HIGHMEM
>  
>  config X86_PAE
>  	bool "PAE (Physical Address Extension) Support"
> -	depends on X86_32 && X86_HAVE_PAE
> +	depends on X86_32 && X86_CMOV

Coupling CMOV to PAE ... :-/

> +config X86_CMOV
> +	bool "Require 686-class CMOV instructions" if X86_32
> +	default y
>  	help
> -	  This is the processor type of your CPU. This information is
> -	  used for optimizing purposes. In order to compile a kernel
> -	  that can run on all supported x86 CPU types (albeit not
> -	  optimally fast), you can specify "586" here.
> +	  Most x86-32 processor implementations are compatible with
> +	  the the CMOV instruction originally added in the Pentium Pro,
> +	  and they perform much better when using it.
> +
> +	  Disable this option to build for 586-class CPUs without this
> +	  instruction. This is only required for the original Intel
> +	  Pentium (P5, P54, P55), AMD K6/K6-II/K6-3D, Geode GX1 and Via
> +	  CyrixIII/C3 CPUs.

Very few users will know anything about CMOV.

I'd argue the right path forward is to just bite the bullet and remove 
non-CMOV support as well, that would be the outcome *anyway* in a few 
years. That would allow basically a single 'modern' 32-bit kernel that 
is supposed to boot on every supported CPU. People might even end up 
testing it ... ;-)

Thanks,

	Ingo