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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Anup Patel <apatel@ventanamicro.com>
Cc: "Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Jassi Brar" <jassisinghbrar@gmail.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	"Mika Westerberg" <mika.westerberg@linux.intel.com>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	"Bartosz Golaszewski" <brgl@bgdev.pl>,
	"Uwe Kleine-König" <ukleinek@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Len Brown" <lenb@kernel.org>,
	"Sunil V L" <sunilvl@ventanamicro.com>,
	"Rahul Pathak" <rpathak@ventanamicro.com>,
	"Leyfoon Tan" <leyfoon.tan@starfivetech.com>,
	"Atish Patra" <atish.patra@linux.dev>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Samuel Holland" <samuel.holland@sifive.com>,
	"Anup Patel" <anup@brainfault.org>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 13/23] irqchip: Add driver for the RPMI system MSI service group
Date: Mon, 12 May 2025 09:50:17 +0300	[thread overview]
Message-ID: <aCGaKXOOWyM4JQMg@smile.fi.intel.com> (raw)
In-Reply-To: <20250511133939.801777-14-apatel@ventanamicro.com>

On Sun, May 11, 2025 at 07:09:29PM +0530, Anup Patel wrote:
> The RPMI specification defines a system MSI service group which
> allows application processors to receive MSIs upon system events
> such as graceful shutdown/reboot request, CPU hotplug event, memory
> hotplug event, etc.
> 
> Add an irqchip driver for the RISC-V RPMI system MSI service group
> to directly receive system MSIs in Linux kernel.

...

> +/*
> + * Copyright (C) 2025 Ventana Micro Systems Inc.
> + */

It can occupy a single line instead of 3 LoCs.

...

> +#include <linux/bitfield.h>
> +#include <linux/bitops.h>
> +#include <linux/cpu.h>
> +#include <linux/interrupt.h>
> +#include <linux/irqchip.h>
> +#include <linux/mailbox_client.h>
> +#include <linux/mailbox/riscv-rpmi-message.h>
> +#include <linux/module.h>
> +#include <linux/msi.h>
> +#include <linux/of_irq.h>
> +#include <linux/platform_device.h>
> +#include <linux/printk.h>
> +#include <linux/smp.h>

+ types.h

Actually this one is most clean, the rest of the patches where the new code
is introduced has semi-random list of the inclusions, please, follow the IWYU
principle.

...

> +static void rpmi_sysmsi_irq_mask(struct irq_data *d)
> +{
> +	struct rpmi_sysmsi_priv *priv = irq_data_get_irq_chip_data(d);
> +	int ret;
> +
> +	ret = rpmi_sysmsi_set_msi_state(priv, d->hwirq, 0);

Please, use the respective getter and the type:

	irq_hw_number_t hwirq = irqd_to_hwirq(d);

Ditto for all other similar cases.

> +	if (ret) {
> +		dev_warn(priv->dev, "Failed to mask hwirq %d (error %d)\n",
> +			 (u32)d->hwirq, ret);

No, this is wrong in two ways: usage of specified for signed value and
passing the unsigned; using explicit casting to something unsigned.
Instead ofa the explicit casting, find the best formatting specifier
and use it.

Ditto for  all your code.

> +	}
> +	irq_chip_mask_parent(d);
> +}

...

> +static int rpmi_sysmsi_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct rpmi_sysmsi_priv *priv;
> +	int rc;
> +
> +	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> +	if (!priv)
> +		return -ENOMEM;
> +	priv->dev = dev;
> +	platform_set_drvdata(pdev, priv);
> +
> +	/* Setup mailbox client */
> +	priv->client.dev		= priv->dev;
> +	priv->client.rx_callback	= NULL;
> +	priv->client.tx_block		= false;
> +	priv->client.knows_txdone	= true;
> +	priv->client.tx_tout		= 0;
> +
> +	/* Request mailbox channel */
> +	priv->chan = mbox_request_channel(&priv->client, 0);
> +	if (IS_ERR(priv->chan))
> +		return PTR_ERR(priv->chan);
> +
> +	/* Get number of system MSIs */
> +	rc = rpmi_sysmsi_get_num_msi(priv);
> +	if (rc < 1) {
> +		mbox_free_channel(priv->chan);
> +		return dev_err_probe(dev, -ENODEV, "No system MSIs found\n");

Can rc be negative holding an error code? If so, why does the code shadow that?

> +	}
> +	priv->nr_irqs = rc;
> +
> +	/* Set the device MSI domain if not available */
> +	if (!dev_get_msi_domain(dev)) {
> +		/*
> +		 * The device MSI domain for OF devices is only set at the
> +		 * time of populating/creating OF device. If the device MSI
> +		 * domain is discovered later after the OF device is created
> +		 * then we need to set it explicitly before using any platform
> +		 * MSI functions.
> +		 */
> +		if (is_of_node(dev_fwnode(dev)))
> +			of_msi_configure(dev, to_of_node(dev_fwnode(dev)));
> +
> +		if (!dev_get_msi_domain(dev))
> +			return -EPROBE_DEFER;
> +	}
> +
> +	if (!msi_create_device_irq_domain(dev, MSI_DEFAULT_DOMAIN,
> +					  &rpmi_sysmsi_template,
> +					  priv->nr_irqs, priv, priv))
> +		return dev_err_probe(dev, -ENOMEM, "failed to create MSI irq domain\n");
> +
> +	dev_info(dev, "%d system MSIs registered\n", priv->nr_irqs);
> +	return 0;
> +}

...

> +/** RPMI system MSI service IDs */

Why does this have a kernel-doc marker?

> +enum rpmi_sysmsi_service_id {
> +	RPMI_SYSMSI_SRV_ENABLE_NOTIFICATION = 0x01,
> +	RPMI_SYSMSI_SRV_GET_ATTRIBUTES = 0x2,
> +	RPMI_SYSMSI_SRV_GET_MSI_ATTRIBUTES = 0x3,
> +	RPMI_SYSMSI_SRV_SET_MSI_STATE = 0x4,
> +	RPMI_SYSMSI_SRV_GET_MSI_STATE = 0x5,
> +	RPMI_SYSMSI_SRV_SET_MSI_TARGET = 0x6,
> +	RPMI_SYSMSI_SRV_GET_MSI_TARGET = 0x7,

Please, be consistent in the style of values.

> +	RPMI_SYSMSI_SRV_ID_MAX_COUNT,

No comma in the terminator entry.

> +};

-- 
With Best Regards,
Andy Shevchenko



  reply	other threads:[~2025-05-12  6:50 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-11 13:39 [PATCH v3 00/23] Linux SBI MPXY and RPMI drivers Anup Patel
2025-05-11 13:39 ` [PATCH v3 01/23] riscv: Add new error codes defined by SBI v3.0 Anup Patel
2025-05-11 13:39 ` [PATCH v3 02/23] dt-bindings: mailbox: Add bindings for RPMI shared memory transport Anup Patel
2025-05-19 17:26   ` Rob Herring
2025-05-21  6:12     ` Anup Patel
2025-05-11 13:39 ` [PATCH v3 03/23] dt-bindings: mailbox: Add bindings for RISC-V SBI MPXY extension Anup Patel
2025-05-11 13:39 ` [PATCH v3 04/23] RISC-V: Add defines for the SBI message proxy extension Anup Patel
2025-05-11 13:39 ` [PATCH v3 05/23] mailbox: Add common header for RPMI messages sent via mailbox Anup Patel
2025-05-11 13:39 ` [PATCH v3 06/23] mailbox: Allow controller specific mapping using fwnode Anup Patel
2025-05-11 13:39 ` [PATCH v3 07/23] mailbox: Add RISC-V SBI message proxy (MPXY) based mailbox driver Anup Patel
2025-05-12 18:54   ` Thomas Gleixner
2025-05-21  6:08     ` Anup Patel
2025-05-11 13:39 ` [PATCH v3 08/23] dt-bindings: clock: Add RPMI clock service message proxy bindings Anup Patel
2025-05-11 13:39 ` [PATCH v3 09/23] dt-bindings: clock: Add RPMI clock service controller bindings Anup Patel
2025-05-11 13:39 ` [PATCH v3 10/23] clk: Add clock driver for the RISC-V RPMI clock service group Anup Patel
2025-05-12  7:07   ` Andy Shevchenko
2025-05-12  9:58     ` Rahul Pathak
2025-05-12 14:15       ` Andy Shevchenko
2025-05-22 13:14     ` Rahul Pathak
2025-05-23 16:35       ` Andy Shevchenko
2025-05-11 13:39 ` [PATCH v3 11/23] dt-bindings: Add RPMI system MSI message proxy bindings Anup Patel
2025-05-11 13:39 ` [PATCH v3 12/23] dt-bindings: Add RPMI system MSI interrupt controller bindings Anup Patel
2025-05-11 13:39 ` [PATCH v3 13/23] irqchip: Add driver for the RPMI system MSI service group Anup Patel
2025-05-12  6:50   ` Andy Shevchenko [this message]
2025-05-21 11:37     ` Anup Patel
2025-05-21 14:11       ` Andy Shevchenko
2025-05-23 11:38         ` Anup Patel
2025-05-12 18:58   ` Thomas Gleixner
2025-05-21 11:37     ` Anup Patel
2025-05-11 13:39 ` [PATCH v3 14/23] ACPI: property: Refactor acpi_fwnode_get_reference_args() Anup Patel
2025-05-12  8:43   ` Andy Shevchenko
2025-05-11 13:39 ` [PATCH v3 15/23] ACPI: property: Add support for cells property Anup Patel
2025-05-12  7:16   ` Andy Shevchenko
2025-05-12  8:30     ` Sunil V L
2025-05-11 13:39 ` [PATCH v3 16/23] ACPI: scan: Update honor list for RPMI System MSI Anup Patel
2025-05-11 13:39 ` [PATCH v3 17/23] ACPI: RISC-V: Create interrupt controller list in sorted order Anup Patel
2025-05-11 13:39 ` [PATCH v3 18/23] ACPI: RISC-V: Add support to update gsi range Anup Patel
2025-05-12  7:31   ` Andy Shevchenko
2025-05-11 13:39 ` [PATCH v3 19/23] ACPI: RISC-V: Add RPMI System MSI to GSI mapping Anup Patel
2025-05-11 13:39 ` [PATCH v3 20/23] mailbox/riscv-sbi-mpxy: Add ACPI support Anup Patel
2025-05-12  7:28   ` Andy Shevchenko
2025-05-12  8:36     ` Sunil V L
2025-05-12  8:47       ` Andy Shevchenko
2025-05-12  8:57         ` Sunil V L
2025-05-11 13:39 ` [PATCH v3 21/23] irqchip/riscv-rpmi-sysmsi: " Anup Patel
2025-05-12  7:34   ` Andy Shevchenko
2025-05-12  8:42     ` Sunil V L
2025-05-11 13:39 ` [PATCH v3 22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig Anup Patel
2025-05-11 13:39 ` [PATCH v3 23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers Anup Patel

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