From: Ingo Molnar <mingo@kernel.org>
To: Elena Reshetova <elena.reshetova@intel.com>
Cc: dave.hansen@intel.com, jarkko@kernel.org, seanjc@google.com,
kai.huang@intel.com, linux-sgx@vger.kernel.org,
linux-kernel@vger.kernel.org, x86@kernel.org,
asit.k.mallick@intel.com, vincent.r.scarlata@intel.com,
chongc@google.com, erdemaktas@google.com, vannapurve@google.com,
dionnaglaze@google.com, bondarn@google.com,
scott.raynor@intel.com
Subject: Re: [PATCH v5 2/5] x86/cpufeatures: Add X86_FEATURE_SGX_EUPDATESVN feature flag
Date: Mon, 19 May 2025 09:47:13 +0200 [thread overview]
Message-ID: <aCriAfYTS7Xz3so9@gmail.com> (raw)
In-Reply-To: <20250519072603.328429-3-elena.reshetova@intel.com>
* Elena Reshetova <elena.reshetova@intel.com> wrote:
> Add a flag indicating whenever ENCLS[EUPDATESVN] SGX instruction
> is supported. This will be used by SGX driver to perform CPU
> SVN updates.
>
> Signed-off-by: Elena Reshetova <elena.reshetova@intel.com>
> ---
> arch/x86/include/asm/cpufeatures.h | 1 +
> arch/x86/kernel/cpu/scattered.c | 1 +
> tools/arch/x86/include/asm/cpufeatures.h | 1 +
> 3 files changed, 3 insertions(+)
>
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index 6c2c152d8a67..ed0c0fa5822a 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -481,6 +481,7 @@
> #define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
> #define X86_FEATURE_AMD_WORKLOAD_CLASS (21*32 + 7) /* Workload Classification */
> #define X86_FEATURE_PREFER_YMM (21*32 + 8) /* Avoid ZMM registers due to downclocking */
> +#define X86_FEATURE_SGX_EUPDATESVN (21*32 + 9) /* Support for ENCLS[EUPDATESVN] instruction */
Please base the patches on the latest x86 tree, there's been two
additions already in this area.
> /*
> * BUG word(s)
> diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
> index 16f3ca30626a..a7e1fcedca3c 100644
> --- a/arch/x86/kernel/cpu/scattered.c
> +++ b/arch/x86/kernel/cpu/scattered.c
> @@ -41,6 +41,7 @@ static const struct cpuid_bit cpuid_bits[] = {
> { X86_FEATURE_PER_THREAD_MBA, CPUID_ECX, 0, 0x00000010, 3 },
> { X86_FEATURE_SGX1, CPUID_EAX, 0, 0x00000012, 0 },
> { X86_FEATURE_SGX2, CPUID_EAX, 1, 0x00000012, 0 },
> + { X86_FEATURE_SGX_EUPDATESVN, CPUID_EAX, 10, 0x00000012, 0 },
> { X86_FEATURE_SGX_EDECCSSA, CPUID_EAX, 11, 0x00000012, 0 },
> { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 },
> { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 },
So it should be obvious at a glance that this new line doesn't follow
the coding convention of the surrounding lines...
Thanks,
Ingo
next prev parent reply other threads:[~2025-05-19 7:47 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-19 7:24 [PATCH v5 0/5] Enable automatic SVN updates for SGX enclaves Elena Reshetova
2025-05-19 7:24 ` [PATCH v5 1/5] x86/sgx: Introduce a counter to count the sgx_(vepc_)open() Elena Reshetova
2025-05-19 10:47 ` Huang, Kai
2025-05-19 11:35 ` Huang, Kai
2025-05-19 11:43 ` Reshetova, Elena
2025-05-19 11:47 ` Reshetova, Elena
2025-05-19 17:28 ` Jarkko Sakkinen
2025-05-19 22:34 ` Huang, Kai
2025-05-20 6:22 ` Reshetova, Elena
2025-05-19 17:21 ` Jarkko Sakkinen
2025-05-20 6:25 ` Reshetova, Elena
2025-05-20 19:55 ` Jarkko Sakkinen
2025-05-19 7:24 ` [PATCH v5 2/5] x86/cpufeatures: Add X86_FEATURE_SGX_EUPDATESVN feature flag Elena Reshetova
2025-05-19 7:47 ` Ingo Molnar [this message]
2025-05-19 11:29 ` Reshetova, Elena
2025-05-19 10:53 ` Huang, Kai
2025-05-19 11:29 ` Reshetova, Elena
2025-05-19 7:24 ` [PATCH v5 3/5] x86/sgx: Define error codes for use by ENCLS[EUPDATESVN] Elena Reshetova
2025-05-19 10:57 ` Huang, Kai
2025-05-19 11:30 ` Reshetova, Elena
2025-05-19 11:36 ` Huang, Kai
2025-05-19 7:24 ` [PATCH v5 4/5] x86/sgx: Implement ENCLS[EUPDATESVN] Elena Reshetova
2025-05-19 11:32 ` Huang, Kai
2025-05-19 11:41 ` Reshetova, Elena
2025-05-19 22:45 ` Huang, Kai
2025-05-20 6:36 ` Reshetova, Elena
2025-05-20 10:42 ` Huang, Kai
2025-05-19 16:02 ` Dave Hansen
2025-05-19 18:24 ` Jarkko Sakkinen
2025-05-20 6:31 ` Reshetova, Elena
2025-05-20 19:57 ` Jarkko Sakkinen
2025-05-20 20:00 ` Dave Hansen
2025-05-19 7:24 ` [PATCH v5 5/5] x86/sgx: Enable automatic SVN updates for SGX enclaves Elena Reshetova
2025-05-19 8:00 ` Ingo Molnar
2025-05-19 11:27 ` Reshetova, Elena
2025-05-19 12:51 ` Ingo Molnar
2025-05-20 6:43 ` Reshetova, Elena
2025-05-20 7:22 ` Ingo Molnar
2025-05-19 18:32 ` Jarkko Sakkinen
2025-05-20 6:46 ` Reshetova, Elena
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aCriAfYTS7Xz3so9@gmail.com \
--to=mingo@kernel.org \
--cc=asit.k.mallick@intel.com \
--cc=bondarn@google.com \
--cc=chongc@google.com \
--cc=dave.hansen@intel.com \
--cc=dionnaglaze@google.com \
--cc=elena.reshetova@intel.com \
--cc=erdemaktas@google.com \
--cc=jarkko@kernel.org \
--cc=kai.huang@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-sgx@vger.kernel.org \
--cc=scott.raynor@intel.com \
--cc=seanjc@google.com \
--cc=vannapurve@google.com \
--cc=vincent.r.scarlata@intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox