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X-CSE-ConnectionGUID: +I/SBokaSCObzM07B3uaFw== X-CSE-MsgGUID: px75wd/oRIaO7CxxJxdXEg== X-IronPort-AV: E=McAfee;i="6700,10204,11441"; a="75522094" X-IronPort-AV: E=Sophos;i="6.15,311,1739865600"; d="scan'208";a="75522094" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 May 2025 03:29:30 -0700 X-CSE-ConnectionGUID: HrBfmwpQQvqMks20J/JY6g== X-CSE-MsgGUID: a+CwcV1LRRSjgimO27u1cw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,311,1739865600"; d="scan'208";a="146700425" Received: from black.fi.intel.com ([10.237.72.28]) by fmviesa004.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 May 2025 03:29:25 -0700 Date: Sat, 24 May 2025 13:29:22 +0300 From: Raag Jadav To: Alexander Usyskin Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Lucas De Marchi , Thomas =?iso-8859-1?Q?Hellstr=F6m?= , Rodrigo Vivi , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , Karthik Poosa , Reuven Abliyev , Oren Weil , linux-mtd@lists.infradead.org, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v10 08/10] drm/xe/nvm: add on-die non-volatile memory device Message-ID: References: <20250515133345.2805031-1-alexander.usyskin@intel.com> <20250515133345.2805031-9-alexander.usyskin@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250515133345.2805031-9-alexander.usyskin@intel.com> On Thu, May 15, 2025 at 04:33:43PM +0300, Alexander Usyskin wrote: > Enable access to internal non-volatile memory on DGFX > with GSC/CSC devices via a child device. > The nvm child device is exposed via auxiliary bus. ... > +void xe_nvm_init(struct xe_device *xe) > +{ Same as patch 6, please handle errors. > + struct pci_dev *pdev = to_pci_dev(xe->drm.dev); > + struct intel_dg_nvm_dev *nvm; > + struct auxiliary_device *aux_dev; > + int ret; > + > + if (!xe->info.has_gsc_nvm) > + return; > + > + /* No access to internal NVM from VFs */ > + if (IS_SRIOV_VF(xe)) > + return; > + > + /* Nvm pointer should be NULL here */ > + if (WARN_ON(xe->nvm)) > + return; > + > + xe->nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); > + if (!xe->nvm) > + return; > + > + nvm = xe->nvm; > + > + nvm->writeable_override = false; > + nvm->bar.parent = &pdev->resource[0]; > + nvm->bar.start = GEN12_GUNIT_NVM_BASE + pdev->resource[0].start; > + nvm->bar.end = nvm->bar.start + GEN12_GUNIT_NVM_SIZE - 1; Just out of curiosity, why off by one? Aren't ioremaps all PAGE_SIZEd? > + nvm->bar.flags = IORESOURCE_MEM; > + nvm->bar.desc = IORES_DESC_NONE; > + nvm->regions = regions; > + > + aux_dev = &nvm->aux_dev; > + > + aux_dev->name = "nvm"; > + aux_dev->id = (pci_domain_nr(pdev->bus) << 16) | > + PCI_DEVID(pdev->bus->number, pdev->devfn); Ditto as patch 6. > + aux_dev->dev.parent = &pdev->dev; > + aux_dev->dev.release = xe_nvm_release_dev; > + > + ret = auxiliary_device_init(aux_dev); > + if (ret) { > + drm_err(&xe->drm, "xe-nvm aux init failed %d\n", ret); > + return; > + } > + > + ret = auxiliary_device_add(aux_dev); > + if (ret) { > + drm_err(&xe->drm, "xe-nvm aux add failed %d\n", ret); > + auxiliary_device_uninit(aux_dev); > + return; > + } > +} Raag