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Sun, 01 Jun 2025 10:33:00 -0700 (PDT) Date: Sun, 1 Jun 2025 10:32:58 -0700 From: Drew Fustini To: Michal Wilczynski Cc: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?iso-8859-1?Q?Bj=F6rn?= Roy Baron , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Guo Ren , Fu Wei , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Marek Szyprowski , linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org Subject: Re: [PATCH RFC 5/6] riscv: dts: thead: Add PVT node Message-ID: References: <20250524-rust-next-pwm-working-fan-for-sending-v1-0-bdd2d5094ff7@samsung.com> <20250524-rust-next-pwm-working-fan-for-sending-v1-5-bdd2d5094ff7@samsung.com> <61eecafb-8ad1-4306-88cb-a032eefb2e48@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <61eecafb-8ad1-4306-88cb-a032eefb2e48@samsung.com> On Sun, Jun 01, 2025 at 09:50:52AM +0200, Michal Wilczynski wrote: > > > On 5/27/25 10:00, Drew Fustini wrote: > > On Sat, May 24, 2025 at 11:14:59PM +0200, Michal Wilczynski wrote: > >> Add PVT DT node for thermal sensor. > >> > >> Signed-off-by: Michal Wilczynski > >> --- > >> arch/riscv/boot/dts/thead/th1520.dtsi | 11 +++++++++++ > >> 1 file changed, 11 insertions(+) > >> > >> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi > >> index f24e12d7259fabcfbdc2dfa966d759db06684ab4..faf5c3aaf209b24cd99ddc377a88e08a8cce24fe 100644 > >> --- a/arch/riscv/boot/dts/thead/th1520.dtsi > >> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi > >> @@ -648,6 +648,17 @@ padctrl_aosys: pinctrl@fffff4a000 { > >> thead,pad-group = <1>; > >> }; > >> > >> + pvt: pvt@fffff4e000 { > >> + compatible = "moortec,mr75203"; > >> + reg = <0xff 0xfff4e000 0x0 0x80>, > >> + <0xff 0xfff4e080 0x0 0x100>, > >> + <0xff 0xfff4e180 0x0 0x680>, > >> + <0xff 0xfff4e800 0x0 0x600>; > >> + reg-names = "common", "ts", "pd", "vm"; > >> + clocks = <&aonsys_clk>; > >> + #thermal-sensor-cells = <1>; > >> + }; > >> + > >> gpio@fffff52000 { > >> compatible = "snps,dw-apb-gpio"; > >> reg = <0xff 0xfff52000 0x0 0x1000>; > >> > >> -- > >> 2.34.1 > >> > > > > I found that on my lpi4a that boot while hang after applying this patch. > > I think that it is related to clocks as boot finished okay when using > > clk_ignore_unused on the kernel cmdline. Do you happen have that in your > > kernel cmdline? > > > > I need to investigate further to understand which clocks are causing the > > problem. > > > > Thanks, > > Drew > > > > Thanks for your earlier message. I've investigated, and you were right > about the clocks – the specific one causing the hang is CLK_CPU2AON_X2H. Thanks for tracking down the clk causing the hang. I can confirm that this fixes the boot hang: diff --git a/drivers/clk/thead/clk-th1520-ap.c b/drivers/clk/thead/clk-th1520-ap.c index ebfb1d59401d..4d0179b8c17c 100644 --- a/drivers/clk/thead/clk-th1520-ap.c +++ b/drivers/clk/thead/clk-th1520-ap.c @@ -792,7 +792,7 @@ static CCU_GATE(CLK_AON2CPU_A2X, aon2cpu_a2x_clk, "aon2cpu-a2x", axi4_cpusys2_ac 0x134, BIT(8), 0); static CCU_GATE(CLK_X2X_CPUSYS, x2x_cpusys_clk, "x2x-cpusys", axi4_cpusys2_aclk_pd, 0x134, BIT(7), 0); -static CCU_GATE(CLK_CPU2AON_X2H, cpu2aon_x2h_clk, "cpu2aon-x2h", axi_aclk_pd, 0x138, BIT(8), 0); +static CCU_GATE(CLK_CPU2AON_X2H, cpu2aon_x2h_clk, "cpu2aon-x2h", axi_aclk_pd, 0x138, BIT(8), CLK_IGNORE_UNUSED); static CCU_GATE(CLK_CPU2PERI_X2H, cpu2peri_x2h_clk, "cpu2peri-x2h", axi4_cpusys2_aclk_pd, 0x140, BIT(9), CLK_IGNORE_UNUSED); static CCU_GATE(CLK_PERISYS_APB1_HCLK, perisys_apb1_hclk, "perisys-apb1-hclk", perisys_ahb_hclk_pd, > > This appears to be an AHB bus clock required for CPU access to the AON > domain. My proposed solution is to make the pvt node a child of a new > parent bus node in the Device Tree. This new "AON bus" node would then > explicitly request and manage CLK_CPU2AON_X2H, ensuring it's enabled > when its children are accessed. > > What are your thoughts on this approach? I think that is a good approach. The alternative would be to just add CLK_IGNORE_UNUSED like above. I've done it before but it is a bit of a hack. Thanks, Drew