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Peter Anvin" Cc: Paolo Bonzini , Lai Jiangshan , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Lai Jiangshan , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Fri, Jun 06, 2025, H. Peter Anvin wrote: > On 2021-12-09 09:55, Paolo Bonzini wrote: > > On 12/7/21 10:52, Lai Jiangshan wrote: > > > From: Lai Jiangshan > > >=20 > > > In the SDM: > > > If the logical processor is in 64-bit mode or if CR4.PCIDE =3D 1, an > > > attempt to clear CR0.PG causes a general-protection exception (#GP). > > > Software should transition to compatibility mode and clear CR4.PCIDE > > > before attempting to disable paging. > > >=20 > > > Signed-off-by: Lai Jiangshan > > > --- > > > =C2=A0 arch/x86/kvm/x86.c | 3 ++- > > > =C2=A0 1 file changed, 2 insertions(+), 1 deletion(-) > > >=20 > > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > > > index 00f5b2b82909..78c40ac3b197 100644 > > > --- a/arch/x86/kvm/x86.c > > > +++ b/arch/x86/kvm/x86.c > > > @@ -906,7 +906,8 @@ int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned > > > long cr0) > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 !load_pdptrs(v= cpu, kvm_read_cr3(vcpu))) > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 1; > > > -=C2=A0=C2=A0=C2=A0 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu= , X86_CR4_PCIDE)) > > > +=C2=A0=C2=A0=C2=A0 if (!(cr0 & X86_CR0_PG) && > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 (is_64_bit_mode(vcpu) || = kvm_read_cr4_bits(vcpu, > > > X86_CR4_PCIDE))) > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return 1; > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 static_call(kvm_x86_set_cr0)(vcpu, cr0= ); > > >=20 > >=20 > > Queued, thanks. > >=20 >=20 > Have you actually checked to see what real CPUs do in this case? I have now, and EMR at least behaves as the SDM describes. Why do you ask? kvm_intel: Clearing CR0.PG faulted (vector =3D 13) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index f79604bc0127..f90ad464ab7e 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -8637,6 +8637,23 @@ void vmx_exit(void) kvm_x86_vendor_exit(); } =20 +static noinline void vmx_disable_paging(void) +{ + unsigned long cr0 =3D native_read_cr0(); + long vector =3D -1; + + asm volatile("1: mov %1, %%cr0\n\t" + " mov %2, %%cr0\n\t" + "2:" + _ASM_EXTABLE_FAULT(1b, 2b) + : "+a" (vector) + : "r" (cr0 & ~X86_CR0_PG), "r" (cr0) + : "cc", "memory" ); + + pr_warn("Clearing CR0.PG %s (vector =3D %ld)\n", + vector < 0 ? "succeeded" : "faulted", vector); +} + int __init vmx_init(void) { int r, cpu; @@ -8644,6 +8661,8 @@ int __init vmx_init(void) if (!kvm_is_vmx_supported()) return -EOPNOTSUPP; =20 + vmx_disable_paging(); + /* * Note, hv_init_evmcs() touches only VMX knobs, i.e. there's nothi= ng * to unwind if a later step fails.