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From: Sean Christopherson <seanjc@google.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: "Xin Li (Intel)" <xin@zytor.com>,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	 tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
	 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
	 pbonzini@redhat.com, brgerst@gmail.com, tony.luck@intel.com,
	 fenghuay@nvidia.com
Subject: Re: [PATCH v1 2/3] x86/traps: Initialize DR7 by writing its architectural reset value
Date: Fri, 13 Jun 2025 07:10:57 -0700	[thread overview]
Message-ID: <aEwxcVzQubz3BmmJ@google.com> (raw)
In-Reply-To: <20250613071536.GG2273038@noisy.programming.kicks-ass.net>

On Fri, Jun 13, 2025, Peter Zijlstra wrote:
> On Fri, Jun 13, 2025 at 12:01:16AM -0700, Xin Li (Intel) wrote:
> 
> > While at it, replace the hardcoded debug register number 7 with the
> > existing DR_CONTROL macro for clarity.
> 
> Yeah, not really a fan of that... IMO that obfuscates the code more than
> it helps, consider:

+1, and NAK to the KVM changes.  Pretty much everything in KVM deals with the
"raw" names.  The use of dr6 and dr7 is pervasive throughout the VMX and SVM
architectures:

 vmcs.GUEST_DR7
 vmcb.save.dr6
 vmcb.save.dr7

And is cemented in KVM's uAPI:

 kvm_debug_exit_arch.dr6
 kvm_debug_exit_arch.dr7
 kvm_debugregs.dr6
 kvm_debugregs.dr7

Using DR_STATUS and DR_CONTROL is not an improvement when everything else is using
'6' and '7'.  E.g. I skipped the changelog and was very confused by the '6' =>
DR_STATUS change in the next patch.

And don't even think about renaming the prefixes on these :-)

#define DR6_BUS_LOCK   (1 << 11)
#define DR6_BD		(1 << 13)
#define DR6_BS		(1 << 14)
#define DR6_BT		(1 << 15)
#define DR6_RTM		(1 << 16)
/*
 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
 * We can regard all the bits in DR6_FIXED_1 as active_low bits;
 * they will never be 0 for now, but when they are defined
 * in the future it will require no code change.
 *
 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
 */
#define DR6_ACTIVE_LOW	0xffff0ff0
#define DR6_VOLATILE	0x0001e80f
#define DR6_FIXED_1	(DR6_ACTIVE_LOW & ~DR6_VOLATILE)

#define DR7_BP_EN_MASK	0x000000ff
#define DR7_GE		(1 << 9)
#define DR7_GD		(1 << 13)
#define DR7_FIXED_1	0x00000400
#define DR7_VOLATILE	0xffff2bff

  parent reply	other threads:[~2025-06-13 14:10 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-13  7:01 [PATCH v1 0/3] x86/traps: Fix DR6/DR7 inintialization Xin Li (Intel)
2025-06-13  7:01 ` [PATCH v1 1/3] x86/traps: Move DR7_RESET_VALUE to <uapi/asm/debugreg.h> Xin Li (Intel)
2025-06-13 14:18   ` Sean Christopherson
2025-06-13 17:58     ` Xin Li
2025-06-13 20:03       ` Sean Christopherson
2025-06-13 21:38         ` Xin Li
2025-06-13  7:01 ` [PATCH v1 2/3] x86/traps: Initialize DR7 by writing its architectural reset value Xin Li (Intel)
2025-06-13  7:15   ` Peter Zijlstra
2025-06-13  7:51     ` Xin Li
2025-06-13  7:59       ` H. Peter Anvin
2025-06-13  8:16         ` Peter Zijlstra
2025-06-13 14:10     ` Sean Christopherson [this message]
2025-06-13 17:36       ` Xin Li
2025-06-13  7:01 ` [PATCH v1 3/3] x86/traps: Initialize DR6 " Xin Li (Intel)
2025-06-13  7:18 ` [PATCH v1 0/3] x86/traps: Fix DR6/DR7 inintialization Peter Zijlstra
2025-06-13  7:37   ` Xin Li
2025-06-13 22:43 ` Sohil Mehta
2025-06-13 23:22   ` Xin Li
2025-06-14  3:38     ` H. Peter Anvin
2025-06-16  8:15       ` Ethan Zhao

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