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Mon, 28 Jul 2025 10:11:03 -0700 (PDT) Date: Mon, 28 Jul 2025 19:10:58 +0200 From: Stephan Gerhold To: Konrad Dybcio Cc: Ulf Hansson , Johan Hovold , Bjorn Andersson , Taniya Das , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Imran Shaik , Bartosz Golaszewski , Dmitry Baryshkov , cros-qcom-dts-watchers@chromium.org, Douglas Anderson , Vinod Koul , Richard Acayan , Andy Gross , Ajit Pandey , Luca Weiss , Jonathan Marek , Neil Armstrong , Jagadeesh Kona , Akhil P Oommen , Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski , Konrad Dybcio Subject: Re: [PATCH RFC 24/24] arm64: dts: qcom: x1e80100: Describe GPU_CC power plumbing requirements Message-ID: References: <20250728-topic-gpucc_power_plumbing-v1-0-09c2480fe3e6@oss.qualcomm.com> <20250728-topic-gpucc_power_plumbing-v1-24-09c2480fe3e6@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250728-topic-gpucc_power_plumbing-v1-24-09c2480fe3e6@oss.qualcomm.com> On Mon, Jul 28, 2025 at 06:16:24PM +0200, Konrad Dybcio wrote: > From: Konrad Dybcio > > A number of power rails must be powered on in order for GPU_CC to > function. Ensure that's conveyed to the OS. > > Fixes: 721e38301b79 ("arm64: dts: qcom: x1e80100: Add gpu support") > Signed-off-by: Konrad Dybcio > --- > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > index 5e9a8fa3cf96468b12775f91192cbd779d5ce946..6620517fbb0f3ed715c4901ec53dcbc6235be88f 100644 > --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi > +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi > @@ -3928,6 +3928,12 @@ gpucc: clock-controller@3d90000 { > clocks = <&bi_tcxo_div2>, > <&gcc GCC_GPU_GPLL0_CPH_CLK_SRC>, > <&gcc GCC_GPU_GPLL0_DIV_CPH_CLK_SRC>; > + > + power-domains = <&rpmhpd RPMHPD_CX>, > + <&rpmhpd RPMHPD_MX>, > + <&rpmhpd RPMHPD_GFX>, > + <&rpmhpd RPMHPD_GMXC>; > + > #clock-cells = <1>; > #reset-cells = <1>; > #power-domain-cells = <1>; > To repeat your own message from a couple of months back [1]: > You shouldn't be messing with VDD_GFX on platforms with a GMU. > > Parts of the clock controller are backed by one of the MX rails, > with some logic depending on CX/GFX, but handling of the latter is > fully deferred to the GMU firmware. > > Konrad Please describe somewhere in the cover letter or the individual patches how this relates to the responsibilities of the GMU. I searched for "GMU" in the patch series and couldn't find any note about this. Also: How much is a plain "power on" votes (without a corresponding "required-opps") really worth nowadays? An arbitrary low voltage level on those rails won't be sufficient to make the GPU_CC actually "function". Do you need "required-opps" here? In the videocc/camcc case we have those. Thanks, Stephan [1]: https://lore.kernel.org/linux-arm-msm/2dae7d88-4b3e-452f-9555-05f10b42dabc@oss.qualcomm.com/