From: Nicolin Chen <nicolinc@nvidia.com>
To: Pranjal Shrivastava <praan@google.com>
Cc: kernel test robot <lkp@intel.com>,
<oe-kbuild-all@lists.linux.dev>, <linux-kernel@vger.kernel.org>,
Jason Gunthorpe <jgg@ziepe.ca>,
Alok Tiwari <alok.a.tiwari@oracle.com>
Subject: Re: drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c:305:47: sparse: sparse: incorrect type in assignment (different base types)
Date: Thu, 14 Aug 2025 12:33:39 -0700 [thread overview]
Message-ID: <aJ46E6IFcMGXITDt@Asurada-Nvidia> (raw)
In-Reply-To: <CAN6iL-SXvgRGSmUQ2-M115_y_k=cVCH3M3UATO7SzC8vMV3T9A@mail.gmail.com>
On Thu, Aug 14, 2025 at 07:22:15PM +0530, Pranjal Shrivastava wrote:
> On Thu, Aug 14, 2025 at 7:04 PM Pranjal Shrivastava <praan@google.com> wrote:
> > I assume we'd need something like the following (untested) for this:
> >
> > --- a/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
> > +++ b/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c
> > @@ -303,8 +303,8 @@
> >
> > for (i = 0; i < LVCMDQ_ERR_MAP_NUM_64; i++)
> > vevent_data.lvcmdq_err_map[i] =
> > - readq_relaxed(REG_VINTF(vintf, LVCMDQ_ERR_MAP_64(i)));
> > + cpu_to_le64(readq_relaxed(REG_VINTF(vintf, LVCMDQ_ERR_MAP_64(i))));
> >
> > iommufd_viommu_report_event(viommu, IOMMU_VEVENTQ_TYPE_TEGRA241_CMDQV,
> > &vevent_data, sizeof(vevent_data));
> >
>
> Running `make C=2 drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.o`
> seems to remove the warning, I haven't tested this on HW, though.
> LMK, if this needs to be sent as a separate patch?
I tested and sent a version with your Suggested-by.
Thanks
Nicolin
prev parent reply other threads:[~2025-08-14 19:33 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-14 13:21 drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c:305:47: sparse: sparse: incorrect type in assignment (different base types) kernel test robot
2025-08-14 13:34 ` Pranjal Shrivastava
2025-08-14 13:52 ` Pranjal Shrivastava
2025-08-14 19:33 ` Nicolin Chen [this message]
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