From: Sean Christopherson <seanjc@google.com>
To: Yuguo Li <cs.hugolee@gmail.com>
Cc: pbonzini@redhat.com, tglx@linutronix.de, mingo@redhat.com,
bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com,
x86@kernel.org, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, Yuguo Li <hugoolli@tencent.com>
Subject: Re: [PATCH] KVM: x86: Synchronize APIC State with QEMU when irqchip=split
Date: Wed, 6 Aug 2025 11:20:34 -0700 [thread overview]
Message-ID: <aJOc8vIkds_t3e8C@google.com> (raw)
In-Reply-To: <20250806081051.3533470-1-hugoolli@tencent.com>
On Wed, Aug 06, 2025, Yuguo Li wrote:
> When using split irqchip mode, IOAPIC is handled by QEMU while the LAPIC is
> emulated by KVM. When guest disables LINT0, KVM doesn't exit to QEMU for
> synchronization, leaving IOAPIC unaware of this change. This may cause vCPU
> to be kicked when external devices(e.g. PIT)keep sending interrupts.
I don't entirely follow what the problem is. Is the issue that QEMU injects an
IRQ that should have been blocked? Or is QEMU forcing the vCPU to exit unnecessarily?
> This patch ensure that KVM exits to QEMU for synchronization when the guest
> disables LINT0.
Please wrap at ~75 characters.
> Signed-off-by: Yuguo Li <hugoolli@tencent.com>
> ---
> arch/x86/include/asm/kvm_host.h | 1 +
> arch/x86/kvm/lapic.c | 4 ++++
> arch/x86/kvm/x86.c | 5 +++++
> include/uapi/linux/kvm.h | 1 +
> 4 files changed, 11 insertions(+)
>
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index f19a76d3ca0e..f69ce111bbe0 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -129,6 +129,7 @@
> KVM_ARCH_REQ_FLAGS(32, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
> #define KVM_REQ_UPDATE_PROTECTED_GUEST_STATE \
> KVM_ARCH_REQ_FLAGS(34, KVM_REQUEST_WAIT)
> +#define KVM_REQ_LAPIC_UPDATE KVM_ARCH_REQ(35)
>
> #define CR0_RESERVED_BITS \
> (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 8172c2042dd6..65ffa89bf8a6 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -2329,6 +2329,10 @@ static int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
> val |= APIC_LVT_MASKED;
> val &= apic_lvt_mask[index];
> kvm_lapic_set_reg(apic, reg, val);
> + if (irqchip_split(apic->vcpu->kvm) && (val & APIC_LVT_MASKED)) {
This applies to much more than just LINT0, and for at least LVTPC and LVTCMCI,
KVM definitely doesn't want to exit on every change.
Even for LINT0, it's not obvious that "pushing" from KVM is a better option than
having QEMU "pull" as needed.
At the very least, this would need to be guarded by a capability, otherwise
the new userspace exit would confuse existing VMMs (and probably result in the
VM being terminated).
> + kvm_make_request(KVM_REQ_LAPIC_UPDATE, apic->vcpu);
> + kvm_vcpu_kick(apic->vcpu);
Why kick? Cross-vCPU writes to LINT0 shouldn't be a thing, i.e. the kick should
effectivel be a nop.
next prev parent reply other threads:[~2025-08-06 18:20 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-06 8:10 [PATCH] KVM: x86: Synchronize APIC State with QEMU when irqchip=split Yuguo Li
2025-08-06 18:20 ` Sean Christopherson [this message]
2025-08-07 8:03 ` hugo lee
2025-08-07 18:38 ` Sean Christopherson
2025-08-08 2:46 ` hugo lee
2025-08-11 16:32 ` Sean Christopherson
2025-08-12 9:39 ` David Woodhouse
2025-08-12 10:18 ` hugo lee
2025-08-12 10:08 ` hugo lee
2025-08-12 10:46 ` David Woodhouse
2025-08-12 11:50 ` hugo lee
2025-08-12 12:54 ` David Woodhouse
2025-08-13 9:30 ` hugo lee
2025-08-13 10:03 ` David Woodhouse
2025-08-14 8:54 ` hugo lee
2025-08-14 9:10 ` David Woodhouse
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