Re: [PATCH] ACPI: RISC-V: CPPC: Add CSR_CYCLE for CPPC FFH

Sunil V L
2025-08-12T13:15:30Z

On Tue, Aug 12, 2025 at 07:25:44PM +0800, yunhui cui wrote:
> Hi Sunil,
>
> On Thu, May 15, 2025 at 5:44 PM Yunhui Cui <cuiyunhui@bytedance.com> wrote:
> >
> > Add the read of CSR_CYCLE to cppc_ffh_csr_read() to fix the
> > warning message: "CPPC Cpufreq: cppc_scale_freq_wokrfn: failed
> > to read perf counters".
> >
> > Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
> > ---
> > drivers/acpi/riscv/cppc.c | 5 ++++-
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/acpi/riscv/cppc.c b/drivers/acpi/riscv/cppc.c
> > index 4cdff387deff6..c1acaeb18eac3 100644
> > --- a/drivers/acpi/riscv/cppc.c
> > +++ b/drivers/acpi/riscv/cppc.c
> > @@ -69,11 +69,14 @@ static void cppc_ffh_csr_read(void *read_data)
> > struct sbi_cppc_data *data = (struct sbi_cppc_data *)read_data;
> >
> > switch (data->reg) {
> > - /* Support only TIME CSR for now */
> > case CSR_TIME:
> > data->ret.value = csr_read(CSR_TIME);
> > data->ret.error = 0;
> > break;
> > + case CSR_CYCLE:
> > + data->ret.value = csr_read(CSR_CYCLE);
> > + data->ret.error = 0;
> > + break;
> > default:
> > data->ret.error = -EINVAL;
> > break;
> > --
> > 2.39.2
> >
>
> The purpose of cppc_ffh_csr_read() is to calculate the actual
> frequency of the CPU, which is delta_CSR_CYCLE/delta_CSR_XXX.
>
> CSR_XXX should be a reference clock and does not count during WFI
> (Wait For Interrupt).
>
> Similar solutions include: x86's aperf/mperf, and ARM64's AMU with
> registers SYS_AMEVCNTR0_CORE_EL0/SYS_AMEVCNTR0_CONST_EL0.
>
> However, we know that CSR_TIME in the current code does count during
> WFI. So, is this design unreasonable?
>
> Should we consider proposing an extension to support such a dedicated
> counter (a reference clock that does not count during WFI)? This way,
> the value can be obtained directly in S-mode without trapping to
> M-mode, especially since reading this counter is very frequent.
>
Hi Yunhui,

Yes, but we anticipated that vendors might define their own custom CSRs.
So, we introduced FFH encoding to accommodate such cases.

Thanks,
Sunil