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Mon, 18 Aug 2025 03:43:05 -0700 (PDT) Date: Mon, 18 Aug 2025 12:43:01 +0200 From: Stephan Gerhold To: Dmitry Baryshkov Cc: Bjorn Andersson , Konrad Dybcio , Aleksandrs Vinarskis , Abel Vesa , Xilin Wu , Jens Glathe , Srinivas Kandagatla , Sibi Sankar , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , Christopher Obbard Subject: Re: [PATCH 1/9] arm64: dts: qcom: x1-asus-zenbook-a14: Add missing pinctrl for eDP HPD Message-ID: References: <20250814-x1e80100-add-edp-hpd-v1-0-a52804db53f6@linaro.org> <20250814-x1e80100-add-edp-hpd-v1-1-a52804db53f6@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Mon, Aug 18, 2025 at 01:39:26PM +0300, Dmitry Baryshkov wrote: > On Mon, 18 Aug 2025 at 13:37, Stephan Gerhold > wrote: > > On Mon, Aug 18, 2025 at 01:33:43PM +0300, Dmitry Baryshkov wrote: > > > On Mon, Aug 18, 2025 at 09:44:36AM +0200, Stephan Gerhold wrote: > > > > On Sat, Aug 16, 2025 at 01:06:50AM +0300, Dmitry Baryshkov wrote: > > > > > On Thu, Aug 14, 2025 at 03:30:28PM +0200, Stephan Gerhold wrote: > > > > > > At the moment, we indirectly rely on the boot firmware to set up the > > > > > > pinctrl for the eDP HPD line coming from the internal display. If the boot > > > > > > firmware does not configure the display (e.g. because a different display > > > > > > is selected for output in the UEFI settings), then the display fails to > > > > > > come up and there are several errors in the kernel log: > > > > > > > > > > > > [drm:dpu_encoder_phys_vid_wait_for_commit_done:544] [dpu error]vblank timeout: 80020041 > > > > > > [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110 > > > > > > [drm:dpu_encoder_frame_done_timeout:2715] [dpu error]enc40 frame done timeout > > > > > > ... > > > > > > > > > > > > Fix this by adding the missing pinctrl for gpio119 (func1/edp0_hot and > > > > > > bias-disable according to the ACPI DSDT). > > > > > > > > > > > > Fixes: 6516961352a1 ("arm64: dts: qcom: Add support for X1-based Asus Zenbook A14") > > > > > > Signed-off-by: Stephan Gerhold > > > > > > --- > > > > > > arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi | 9 +++++++++ > > > > > > 1 file changed, 9 insertions(+) > > > > > > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi b/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi > > > > > > index 16d045cf64c08c02c420787e000f4f45cfc2c6ff..613c675aac296f931293a1ba3d8506c6663bad21 100644 > > > > > > --- a/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi > > > > > > +++ b/arch/arm64/boot/dts/qcom/x1-asus-zenbook-a14.dtsi > > > > > > @@ -1001,6 +1001,9 @@ &mdss_dp1_out { > > > > > > &mdss_dp3 { > > > > > > /delete-property/ #sound-dai-cells; > > > > > > > > > > > > + pinctrl-0 = <&edp_hpd_default>; > > > > > > + pinctrl-names = "default"; > > > > > > + > > > > > > status = "okay"; > > > > > > > > > > > > aux-bus { > > > > > > @@ -1236,6 +1239,12 @@ cam_indicator_en: cam-indicator-en-state { > > > > > > bias-disable; > > > > > > }; > > > > > > > > > > > > + edp_hpd_default: edp-hpd-default-state { > > > > > > + pins = "gpio119"; > > > > > > + function = "edp0_hot"; > > > > > > + bias-disable; > > > > > > + }; > > > > > > > > > > I think this is common enough. Let's maybe push this into the SoC dtsi > > > > > instead of copying it to all devices? > > > > > > > > > > > > > I had it there before, but Johan commented on the patch set from Chris > > > > that he would prefer to keep the potentially board-specific pinctrl out > > > > of the SoC dtsi [1]. So I can either address his feedback or yours. :-) > > > > > > > > There isn't really a convention for X1E either - we have a wild mix > > > > where some pinctrl is defined in the SoC dtsi (UART, I2C, SDHCI, ...) > > > > and others is copied for each board (e.g. PCIe). > > > > > > PCIe pinctrl is a part of SoC DTSI for SM8[4567]0. > > > > > > > For some reason it's not on X1E. > > > > > > The reason I chose this approach is that I didn't feel it is guaranteed > > > > that the HPD pin has external pull down. It seems to be the case on most > > > > devices, but in theory a device could maybe rely on the internal pull > > > > down. Might be better to have it explicitly defined, the 5 additional > > > > lines are not that much at the end. > > > > > > I don't think anybody will use internal pull-down for this, it would be > > > too risky in case the eDP cable is bad. I have checked several laptops, > > > they use external pull-down or two MOSFETs. > > > > > > > So are you suggesting to put just the "template" (the > > edp-hpd-default-state node) into the SoC dtsi and keep the > > pinctrl-0/pinctrl-names reference in the board DT, > > Yes. > > > or to put everything > > into the SoC dtsi? I'm not sure if there is a use case where there > > wouldn't be any HPD connected to GPIO119. > > Still it's a board configuration (pretty much like PCIe config is). > Ok, thanks. I'm fine with either approach really (putting it entirely in board DT or the template in SoC dtsi and reference in board DT). I'll wait a couple more days for more opinions, otherwise I'll send a v2 with the template moved to the SoC dtsi. Thanks, Stephan