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AJvYcCVOz3CoEEZ85ENcgrujtDCRaQG75Ct6paW7XBtKbxLF9ktbUo2Ri4xfZRQuKqBaEVqsV82n+3IQdd5++bM=@vger.kernel.org X-Gm-Message-State: AOJu0Yxem/0LuEsD5sUBaAl0qmWoySocw5wxHedcW62wL4oeXPerAgyC oKsbTPL8NLyF8rJZveSy49Ku2lDdRxNU9IpIKURmhmZbPStJzAacsgZR2llQOgUWS8oNpVi0upp QKBt/xA== X-Google-Smtp-Source: AGHT+IFrPKVsWtGyoRgDes4/BkgZ4mpLnvlNMsvJYH0IEb2aj1UmFzpIXxupJE0I5pJ/TaxOfupkVw2RxQU= X-Received: from pjbpl10.prod.google.com ([2002:a17:90b:268a:b0:312:151d:c818]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:48c7:b0:321:265a:e0c2 with SMTP id 98e67ed59e1d1-3234218c09dmr14775914a91.32.1755531332713; Mon, 18 Aug 2025 08:35:32 -0700 (PDT) Date: Mon, 18 Aug 2025 08:35:31 -0700 In-Reply-To: <20250818143126.GHaKM5PsVZPXwr5sPi@fat_crate.local> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <3cc16f7d-c650-43f2-b0ca-d99c427cd69b@amd.com> <20250725065009.GAaIMpIVgAKi0kMBVv@renoirsky.local> <20250815220436.GJaJ-u9FUVTmjyaaua@fat_crate.local> <20250816084218.GAaKBEaukeGa6b5UBj@fat_crate.local> <20250818143126.GHaKM5PsVZPXwr5sPi@fat_crate.local> Message-ID: Subject: Re: [PATCH] x86/CPU/AMD: Ignore invalid reset reason value From: Sean Christopherson To: Borislav Petkov Cc: Mario Limonciello , Yazen Ghannam , x86@kernel.org, linux-kernel@vger.kernel.org, Libing He , David Arcari Content-Type: text/plain; charset="us-ascii" On Mon, Aug 18, 2025, Borislav Petkov wrote: > On Mon, Aug 18, 2025 at 07:24:26AM -0700, Sean Christopherson wrote: > > Most definitely not if the guest owner and host owner are not one and the same. > > The example use case is where the platform owner is running one of _their_ kernels > > in a VM, in which case that kernel probably does want to know why the platform > > reboot. > > Except that can you control who uses that feature? If it ends up being used by > a VM stack where the guest owner should not know the reboot reason, you've > lost. Yeah, but "expose/advertise XYZ to the wrong VM and you've lost" holds true for so many things. In all honesty, of the many ways a hypervisor/CSP can screw up, this one doesn't scare me at all. > > The same thing that guarantees hardware vendors adhere to specs: the desire to > > get paid. > > So you're basically saying all HV vendors return -1 for an unimplemented > register and we should be fine there? For this type of register, yes, they should. > > And QEMU did return an error value, 0xffffffff, a.k.a. PCI Master Abort / PCIe > > Unsupported Request. I would be amazed if any real world, general purpose VMM > > did anything else for an MMIO access to an unknown/unsupported range. > > Ok, I guess we will know soon enough. :-) > > > Huh? Handle a read of all 0xffs as proposed in this patch, and this is unnecessary. > > I don't trust that all HVs will DTRT. But ok, I'll take your word for it. Heh, I don't I trust hypervisors/VMMs either, but if they don't behave, then we yell at them and/or send patches.