From: Alice Ryhl <aliceryhl@google.com>
To: Alistair Popple <apopple@nvidia.com>
Cc: dri-devel@lists.freedesktop.org, dakr@kernel.org,
acourbot@nvidia.com, "Miguel Ojeda" <ojeda@kernel.org>,
"Alex Gaynor" <alex.gaynor@gmail.com>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Gary Guo" <gary@garyguo.net>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Trevor Gross" <tmgross@umich.edu>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"John Hubbard" <jhubbard@nvidia.com>,
"Joel Fernandes" <joelagnelf@nvidia.com>,
"Timur Tabi" <ttabi@nvidia.com>,
linux-kernel@vger.kernel.org, nouveau@lists.freedesktop.org
Subject: Re: [PATCH 04/10] gpu: nova-core: Add a slice-buffer (sbuffer) datastructure
Date: Sun, 7 Sep 2025 10:54:36 +0000 [thread overview]
Message-ID: <aL1kbG0YYy0FQCGM@google.com> (raw)
In-Reply-To: <20250827082015.959430-5-apopple@nvidia.com>
On Wed, Aug 27, 2025 at 06:20:01PM +1000, Alistair Popple wrote:
> From: Joel Fernandes <joelagnelf@nvidia.com>
>
> A data structure that can be used to write across multiple slices which
> may be out of order in memory. This lets SBuffer user correctly and
> safely write out of memory order, without error-prone tracking of
> pointers/offsets.
>
> let mut buf1 = [0u8; 3];
> let mut buf2 = [0u8; 5];
> let mut sbuffer = SBuffer::new([&mut buf1[..], &mut buf2[..]]);
>
> let data = b"hellowo";
> let result = sbuffer.write(data);
>
> An internal conversion of gsp.rs to use this resulted in a nice -ve delta:
> gsp.rs: 37 insertions(+), 99 deletions(-)
>
> Co-developed-by: Alistair Popple <apopple@nvidia.com>
> Signed-off-by: Alistair Popple <apopple@nvidia.com>
> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
This seems like duplication of the logic in rust/kernel/iov_iter.rs [1].
Alice
[1]: https://lore.kernel.org/r/20250822-iov-iter-v5-0-6ce4819c2977@google.com
next prev parent reply other threads:[~2025-09-07 10:54 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-27 8:19 [PATCH 00/10] gpu: nova-core: Boot GSP to RISC-V active Alistair Popple
2025-08-27 8:19 ` [PATCH 01/10] gpu: nova-core: Set correct DMA mask Alistair Popple
2025-08-29 23:55 ` John Hubbard
2025-09-01 23:55 ` Alistair Popple
2025-09-03 19:45 ` John Hubbard
2025-09-03 22:03 ` Alistair Popple
2025-08-27 8:19 ` [PATCH 02/10] gpu: nova-core: Create initial GspSharedMemObjects Alistair Popple
2025-08-27 8:20 ` [PATCH 03/10] gpu: nova-core: gsp: Create wpr metadata Alistair Popple
2025-09-01 7:46 ` Alexandre Courbot
2025-09-03 8:57 ` Alistair Popple
2025-09-03 12:51 ` Alexandre Courbot
2025-09-03 13:10 ` Alexandre Courbot
2025-08-27 8:20 ` [PATCH 04/10] gpu: nova-core: Add a slice-buffer (sbuffer) datastructure Alistair Popple
2025-09-07 10:54 ` Alice Ryhl [this message]
2025-09-08 11:31 ` Alistair Popple
2025-09-08 11:42 ` Alexandre Courbot
2025-09-09 1:11 ` Alistair Popple
2025-08-27 8:20 ` [PATCH 05/10] gpu: nova-core: gsp: Add GSP command queue handling Alistair Popple
2025-08-27 20:35 ` John Hubbard
2025-08-27 23:42 ` Alistair Popple
2025-09-04 4:12 ` Alexandre Courbot
2025-09-04 6:57 ` Alistair Popple
2025-09-04 11:26 ` Alexandre Courbot
2025-09-05 11:50 ` Alexandre Courbot
2025-09-08 5:44 ` Alexandre Courbot
2025-08-27 8:20 ` [PATCH 06/10] gpu: nova-core: gsp: Create rmargs Alistair Popple
2025-08-27 8:20 ` [PATCH 07/10] gpu: nova-core: gsp: Create RM registry and sysinfo commands Alistair Popple
2025-08-29 6:02 ` Alistair Popple
2025-08-27 8:20 ` [PATCH 08/10] gpu: nova-core: falcon: Add support to check if RISC-V is active Alistair Popple
2025-08-29 18:48 ` Timur Tabi
2025-09-02 0:08 ` Alistair Popple
2025-09-19 23:05 ` Timur Tabi
2025-08-27 8:20 ` [PATCH 09/10] gpu: nova-core: falcon: Add support to write firmware version Alistair Popple
2025-08-27 8:20 ` [PATCH 10/10] gpu: nova-core: gsp: Boot GSP Alistair Popple
2025-08-28 8:37 ` [PATCH 00/10] gpu: nova-core: Boot GSP to RISC-V active Miguel Ojeda
2025-08-29 3:03 ` Alexandre Courbot
2025-08-29 7:40 ` Danilo Krummrich
2025-08-29 10:01 ` Miguel Ojeda
2025-08-29 13:47 ` Alexandre Courbot
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