Re: [PATCH 1/5] arm64: dts: qcom: sc8280xp: Fix CCI3 interrupt

Bryan O'Donoghue
2025-09-04T14:36:00Z

On 04/09/2025 15:31, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> This was evidently wrong, as exemplified by the core failing to reset
> at probe (which would be completed by the IRQ firing).
>
> Fix it.
>
> Fixes: 7cfa2e758bf4 ("arm64: dts: qcom: sc8280xp: camss: Add CCI definitions")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 225233a37a4fd9f3d65735915c0338a993a322d1..18b5cb441f955f7a91204376e05536b203f3e28b 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -4292,7 +4292,7 @@ cci3: cci@ac4d000 {
> compatible = "qcom,sc8280xp-cci", "qcom,msm8996-cci";
> reg = <0 0x0ac4d000 0 0x1000>;
>
> - interrupts = <GIC_SPI 650 IRQ_TYPE_EDGE_RISING>;
> + interrupts = <GIC_SPI 771 IRQ_TYPE_EDGE_RISING>;
>
> clocks = <&camcc CAMCC_CAMNOC_AXI_CLK>,
> <&camcc CAMCC_SLOW_AHB_CLK_SRC>,
>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>